Search

Brieanna Tarah Larell Szafran

Examiner (ID: 5269, Phone: (571)270-7627 , Office: P/3765 )

Most Active Art Unit
3765
Art Unit(s)
3765, 3732
Total Applications
513
Issued Applications
144
Pending Applications
3
Abandoned Applications
359

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1324174 [patent_doc_number] => 06611917 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-26 [patent_title] => 'Game machine having a high-power and low-power batteries both supplying power to drive and control circuits with power management to conserve the low-power batteries' [patent_app_type] => B1 [patent_app_number] => 09/427125 [patent_app_country] => US [patent_app_date] => 1999-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 10860 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/611/06611917.pdf [firstpage_image] =>[orig_patent_app_number] => 09427125 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/427125
Game machine having a high-power and low-power batteries both supplying power to drive and control circuits with power management to conserve the low-power batteries Oct 21, 1999 Issued
Array ( [id] => 1407053 [patent_doc_number] => 06560699 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-06 [patent_title] => 'Constraint-based language configuration files for updating and verifying system constraints' [patent_app_type] => B1 [patent_app_number] => 09/420917 [patent_app_country] => US [patent_app_date] => 1999-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4876 [patent_no_of_claims] => 74 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/560/06560699.pdf [firstpage_image] =>[orig_patent_app_number] => 09420917 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/420917
Constraint-based language configuration files for updating and verifying system constraints Oct 19, 1999 Issued
Array ( [id] => 1431484 [patent_doc_number] => 06519698 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-11 [patent_title] => 'Method for saving system configuration information to shorten computer system initialization time by checking the state of a chassis intrusion detection circuit' [patent_app_type] => B1 [patent_app_number] => 09/414656 [patent_app_country] => US [patent_app_date] => 1999-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2165 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/519/06519698.pdf [firstpage_image] =>[orig_patent_app_number] => 09414656 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/414656
Method for saving system configuration information to shorten computer system initialization time by checking the state of a chassis intrusion detection circuit Oct 5, 1999 Issued
Array ( [id] => 1431108 [patent_doc_number] => 06507905 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-14 [patent_title] => 'System for modifying a master partition table of a master boot record to create a personalized local data drive having dedicated allocation for a specified user' [patent_app_type] => B1 [patent_app_number] => 09/409586 [patent_app_country] => US [patent_app_date] => 1999-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3724 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/507/06507905.pdf [firstpage_image] =>[orig_patent_app_number] => 09409586 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/409586
System for modifying a master partition table of a master boot record to create a personalized local data drive having dedicated allocation for a specified user Sep 29, 1999 Issued
Array ( [id] => 1129741 [patent_doc_number] => 06795931 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-21 [patent_title] => 'Method and apparatus for an adjustable delay circuit having arranged serially coarse stages received by a fine delay stage' [patent_app_type] => B1 [patent_app_number] => 09/409367 [patent_app_country] => US [patent_app_date] => 1999-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2995 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/795/06795931.pdf [firstpage_image] =>[orig_patent_app_number] => 09409367 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/409367
Method and apparatus for an adjustable delay circuit having arranged serially coarse stages received by a fine delay stage Sep 29, 1999 Issued
Array ( [id] => 7633044 [patent_doc_number] => 06658576 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-02 [patent_title] => 'Energy-conserving communication apparatus selectively switching between a main processor with main operating instructions and keep-alive processor with keep-alive operating instruction' [patent_app_type] => B1 [patent_app_number] => 09/409017 [patent_app_country] => US [patent_app_date] => 1999-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11453 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 10 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/658/06658576.pdf [firstpage_image] =>[orig_patent_app_number] => 09409017 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/409017
Energy-conserving communication apparatus selectively switching between a main processor with main operating instructions and keep-alive processor with keep-alive operating instruction Sep 28, 1999 Issued
Array ( [id] => 1271987 [patent_doc_number] => 06662302 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-09 [patent_title] => 'Method and apparatus of selecting one of a plurality of predetermined configurations using only necessary bus widths based on power consumption analysis for programmable logic device' [patent_app_type] => B1 [patent_app_number] => 09/408825 [patent_app_country] => US [patent_app_date] => 1999-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5665 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/662/06662302.pdf [firstpage_image] =>[orig_patent_app_number] => 09408825 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/408825
Method and apparatus of selecting one of a plurality of predetermined configurations using only necessary bus widths based on power consumption analysis for programmable logic device Sep 28, 1999 Issued
Array ( [id] => 1294991 [patent_doc_number] => 06640300 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-28 [patent_title] => 'Method and apparatus for width and depth expansion in a multi-queue system' [patent_app_type] => B1 [patent_app_number] => 09/406667 [patent_app_country] => US [patent_app_date] => 1999-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5213 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/640/06640300.pdf [firstpage_image] =>[orig_patent_app_number] => 09406667 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/406667
Method and apparatus for width and depth expansion in a multi-queue system Sep 26, 1999 Issued
Array ( [id] => 1540614 [patent_doc_number] => 06490677 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-03 [patent_title] => 'Method and system for automatically configuring the boot process of a computer having multiple bootstrap programs within a network computer system' [patent_app_type] => B1 [patent_app_number] => 09/397609 [patent_app_country] => US [patent_app_date] => 1999-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3596 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/490/06490677.pdf [firstpage_image] =>[orig_patent_app_number] => 09397609 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/397609
Method and system for automatically configuring the boot process of a computer having multiple bootstrap programs within a network computer system Sep 15, 1999 Issued
Array ( [id] => 1460096 [patent_doc_number] => 06463531 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-08 [patent_title] => 'Method and system for monitoring a boot process of a data processing system providing boot data and user prompt' [patent_app_type] => B1 [patent_app_number] => 09/397608 [patent_app_country] => US [patent_app_date] => 1999-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3338 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/463/06463531.pdf [firstpage_image] =>[orig_patent_app_number] => 09397608 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/397608
Method and system for monitoring a boot process of a data processing system providing boot data and user prompt Sep 15, 1999 Issued
Array ( [id] => 1540617 [patent_doc_number] => 06490678 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-03 [patent_title] => 'Combination editable and fixed entry input menu field used in a menu for a computer system prior to execution of an operating system' [patent_app_type] => B1 [patent_app_number] => 09/397607 [patent_app_country] => US [patent_app_date] => 1999-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5541 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/490/06490678.pdf [firstpage_image] =>[orig_patent_app_number] => 09397607 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/397607
Combination editable and fixed entry input menu field used in a menu for a computer system prior to execution of an operating system Sep 15, 1999 Issued
Array ( [id] => 1329252 [patent_doc_number] => 06606705 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-12 [patent_title] => 'Method and apparatus for configuring an I/O buffer having an initialized default signaling level to operate at a sampled external circuit signaling level' [patent_app_type] => B1 [patent_app_number] => 09/396992 [patent_app_country] => US [patent_app_date] => 1999-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6939 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/606/06606705.pdf [firstpage_image] =>[orig_patent_app_number] => 09396992 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/396992
Method and apparatus for configuring an I/O buffer having an initialized default signaling level to operate at a sampled external circuit signaling level Sep 14, 1999 Issued
Array ( [id] => 1429506 [patent_doc_number] => 06530028 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-04 [patent_title] => 'Image forming apparatus having an efficient localization system, and a method thereof' [patent_app_type] => B1 [patent_app_number] => 09/396900 [patent_app_country] => US [patent_app_date] => 1999-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 5754 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/530/06530028.pdf [firstpage_image] =>[orig_patent_app_number] => 09396900 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/396900
Image forming apparatus having an efficient localization system, and a method thereof Sep 14, 1999 Issued
Array ( [id] => 1553032 [patent_doc_number] => 06446201 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'Method and system of sending reset signals only to slaves requiring reinitialization by a bus master' [patent_app_type] => B1 [patent_app_number] => 09/395450 [patent_app_country] => US [patent_app_date] => 1999-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2411 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/446/06446201.pdf [firstpage_image] =>[orig_patent_app_number] => 09395450 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/395450
Method and system of sending reset signals only to slaves requiring reinitialization by a bus master Sep 13, 1999 Issued
Array ( [id] => 1429409 [patent_doc_number] => 06530015 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-04 [patent_title] => 'Accessing a test condition for multiple sub-operations using a test register' [patent_app_type] => B1 [patent_app_number] => 09/395296 [patent_app_country] => US [patent_app_date] => 1999-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4650 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/530/06530015.pdf [firstpage_image] =>[orig_patent_app_number] => 09395296 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/395296
Accessing a test condition for multiple sub-operations using a test register Sep 12, 1999 Issued
Array ( [id] => 1401418 [patent_doc_number] => 06564316 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-13 [patent_title] => 'Method and apparatus for reducing code size by executing no operation instructions that are not explicitly included in code using programmable delay slots' [patent_app_type] => B1 [patent_app_number] => 09/392641 [patent_app_country] => US [patent_app_date] => 1999-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 4025 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/564/06564316.pdf [firstpage_image] =>[orig_patent_app_number] => 09392641 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/392641
Method and apparatus for reducing code size by executing no operation instructions that are not explicitly included in code using programmable delay slots Sep 8, 1999 Issued
Array ( [id] => 1339657 [patent_doc_number] => 06601176 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-29 [patent_title] => 'Automotive computer system and method whereby responsive to detecting engine cranking main processor enters a suspend mode and current state of devices are stored in volatile memory' [patent_app_type] => B1 [patent_app_number] => 09/392146 [patent_app_country] => US [patent_app_date] => 1999-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4318 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/601/06601176.pdf [firstpage_image] =>[orig_patent_app_number] => 09392146 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/392146
Automotive computer system and method whereby responsive to detecting engine cranking main processor enters a suspend mode and current state of devices are stored in volatile memory Sep 7, 1999 Issued
Array ( [id] => 1325385 [patent_doc_number] => 06615344 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-02 [patent_title] => 'System and method for tracking selectively enabling modules used in an integrated processor using a tracking register providing configuration information to an external pin' [patent_app_type] => B1 [patent_app_number] => 09/389259 [patent_app_country] => US [patent_app_date] => 1999-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1944 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/615/06615344.pdf [firstpage_image] =>[orig_patent_app_number] => 09389259 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/389259
System and method for tracking selectively enabling modules used in an integrated processor using a tracking register providing configuration information to an external pin Sep 2, 1999 Issued
Array ( [id] => 1183734 [patent_doc_number] => 06751742 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-15 [patent_title] => 'System for responding to a power saving mode and method thereof' [patent_app_type] => B1 [patent_app_number] => 09/387535 [patent_app_country] => US [patent_app_date] => 1999-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3126 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/751/06751742.pdf [firstpage_image] =>[orig_patent_app_number] => 09387535 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/387535
System for responding to a power saving mode and method thereof Aug 30, 1999 Issued
Array ( [id] => 1431396 [patent_doc_number] => 06523128 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-18 [patent_title] => 'Controlling power for a sleeping state of a computer to prevent overloading of the stand-by power rails by selectively asserting a control signal' [patent_app_type] => B1 [patent_app_number] => 09/387423 [patent_app_country] => US [patent_app_date] => 1999-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3472 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/523/06523128.pdf [firstpage_image] =>[orig_patent_app_number] => 09387423 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/387423
Controlling power for a sleeping state of a computer to prevent overloading of the stand-by power rails by selectively asserting a control signal Aug 30, 1999 Issued
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