Search

Brieanna Tarah Larell Szafran

Examiner (ID: 5269, Phone: (571)270-7627 , Office: P/3765 )

Most Active Art Unit
3765
Art Unit(s)
3765, 3732
Total Applications
513
Issued Applications
144
Pending Applications
3
Abandoned Applications
359

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7140826 [patent_doc_number] => 20050182988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-18 [patent_title] => 'Adaptive clock skew in a variably loaded memory bus' [patent_app_type] => utility [patent_app_number] => 11/107044 [patent_app_country] => US [patent_app_date] => 2005-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7063 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0182/20050182988.pdf [firstpage_image] =>[orig_patent_app_number] => 11107044 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/107044
Adaptive clock skew in a variably loaded memory bus Apr 14, 2005 Issued
Array ( [id] => 922123 [patent_doc_number] => 07325151 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-01-29 [patent_title] => 'Program, recording medium, method, and information processing apparatus for controlling an execution mode of a CPU' [patent_app_type] => utility [patent_app_number] => 11/060474 [patent_app_country] => US [patent_app_date] => 2005-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7562 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/325/07325151.pdf [firstpage_image] =>[orig_patent_app_number] => 11060474 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/060474
Program, recording medium, method, and information processing apparatus for controlling an execution mode of a CPU Feb 16, 2005 Issued
Array ( [id] => 860462 [patent_doc_number] => 07376857 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-20 [patent_title] => 'Method of timing calibration using slower data rate pattern' [patent_app_type] => utility [patent_app_number] => 11/018384 [patent_app_country] => US [patent_app_date] => 2004-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 7156 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/376/07376857.pdf [firstpage_image] =>[orig_patent_app_number] => 11018384 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/018384
Method of timing calibration using slower data rate pattern Dec 21, 2004 Issued
Array ( [id] => 753299 [patent_doc_number] => 07028208 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-11 [patent_title] => 'Duty cycle distortion compensation for the data output of a memory device' [patent_app_type] => utility [patent_app_number] => 11/018810 [patent_app_country] => US [patent_app_date] => 2004-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6230 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/028/07028208.pdf [firstpage_image] =>[orig_patent_app_number] => 11018810 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/018810
Duty cycle distortion compensation for the data output of a memory device Dec 20, 2004 Issued
Array ( [id] => 7100166 [patent_doc_number] => 20050132080 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-16 [patent_title] => 'Coordinating protocol for a multi-processor system' [patent_app_type] => utility [patent_app_number] => 10/961516 [patent_app_country] => US [patent_app_date] => 2004-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3105 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20050132080.pdf [firstpage_image] =>[orig_patent_app_number] => 10961516 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/961516
Coordinating protocol for a multi-processor system Oct 7, 2004 Abandoned
Array ( [id] => 5722121 [patent_doc_number] => 20060074897 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-06 [patent_title] => 'System and method for dynamic data masking' [patent_app_type] => utility [patent_app_number] => 10/957971 [patent_app_country] => US [patent_app_date] => 2004-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3576 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20060074897.pdf [firstpage_image] =>[orig_patent_app_number] => 10957971 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/957971
System and method for dynamic data masking Oct 3, 2004 Abandoned
Array ( [id] => 427870 [patent_doc_number] => 07272743 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-18 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => utility [patent_app_number] => 10/934462 [patent_app_country] => US [patent_app_date] => 2004-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 4909 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/272/07272743.pdf [firstpage_image] =>[orig_patent_app_number] => 10934462 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/934462
Semiconductor integrated circuit Sep 6, 2004 Issued
Array ( [id] => 7013370 [patent_doc_number] => 20050066077 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-24 [patent_title] => 'Data transfer control device and electronic instrument' [patent_app_type] => utility [patent_app_number] => 10/934461 [patent_app_country] => US [patent_app_date] => 2004-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 20359 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0066/20050066077.pdf [firstpage_image] =>[orig_patent_app_number] => 10934461 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/934461
Data transfer control device and electronic instrument Sep 6, 2004 Issued
Array ( [id] => 7120255 [patent_doc_number] => 20050012084 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-20 [patent_title] => 'Portable fencing system and components therefor' [patent_app_type] => utility [patent_app_number] => 10/914900 [patent_app_country] => US [patent_app_date] => 2004-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7581 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20050012084.pdf [firstpage_image] =>[orig_patent_app_number] => 10914900 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/914900
Portable fencing system and components therefor Aug 9, 2004 Issued
Array ( [id] => 434983 [patent_doc_number] => 07266680 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-09-04 [patent_title] => 'Method and apparatus for loading configuration data' [patent_app_type] => utility [patent_app_number] => 10/901689 [patent_app_country] => US [patent_app_date] => 2004-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3726 [patent_no_of_claims] => 88 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/266/07266680.pdf [firstpage_image] =>[orig_patent_app_number] => 10901689 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/901689
Method and apparatus for loading configuration data Jul 28, 2004 Issued
Array ( [id] => 451238 [patent_doc_number] => 07254732 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-07 [patent_title] => 'Method and apparatus of automatic power management control for serial ATA device directly attached to SAS/SATA host controller' [patent_app_type] => utility [patent_app_number] => 10/901518 [patent_app_country] => US [patent_app_date] => 2004-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3557 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/254/07254732.pdf [firstpage_image] =>[orig_patent_app_number] => 10901518 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/901518
Method and apparatus of automatic power management control for serial ATA device directly attached to SAS/SATA host controller Jul 28, 2004 Issued
Array ( [id] => 7449779 [patent_doc_number] => 20040268169 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-30 [patent_title] => 'Method and apparatus of automatic power management control for native command queuing Serial ATA device' [patent_app_type] => new [patent_app_number] => 10/901520 [patent_app_country] => US [patent_app_date] => 2004-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4071 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0268/20040268169.pdf [firstpage_image] =>[orig_patent_app_number] => 10901520 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/901520
Method and apparatus of automatic power management control for native command queuing Serial ATA device Jul 28, 2004 Issued
Array ( [id] => 7091986 [patent_doc_number] => 20050010831 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'Method and apparatus of automatic power management control for Serial ATA interface utilizing a combination of IOP control and specialized hardware control' [patent_app_type] => utility [patent_app_number] => 10/901519 [patent_app_country] => US [patent_app_date] => 2004-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4541 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0010/20050010831.pdf [firstpage_image] =>[orig_patent_app_number] => 10901519 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/901519
Method and apparatus of automatic power management control for Serial ATA interface utilizing a combination of IOP control and specialized hardware control Jul 28, 2004 Issued
Array ( [id] => 444441 [patent_doc_number] => 07260732 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-08-21 [patent_title] => 'Power regulation system and method for a portable electronic device' [patent_app_type] => utility [patent_app_number] => 10/900770 [patent_app_country] => US [patent_app_date] => 2004-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 8286 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/260/07260732.pdf [firstpage_image] =>[orig_patent_app_number] => 10900770 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/900770
Power regulation system and method for a portable electronic device Jul 27, 2004 Issued
Array ( [id] => 7013534 [patent_doc_number] => 20050066152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-24 [patent_title] => 'Method and apparatus for processing data in a reconfigurable manner' [patent_app_type] => utility [patent_app_number] => 10/892537 [patent_app_country] => US [patent_app_date] => 2004-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6306 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0066/20050066152.pdf [firstpage_image] =>[orig_patent_app_number] => 10892537 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/892537
Method and apparatus for processing data in a reconfigurable manner Jul 13, 2004 Abandoned
Array ( [id] => 518571 [patent_doc_number] => 07203829 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-10 [patent_title] => 'Apparatus and method for initializing coprocessor for use in system comprised of main processor and coprocessor' [patent_app_type] => utility [patent_app_number] => 10/864459 [patent_app_country] => US [patent_app_date] => 2004-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6899 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/203/07203829.pdf [firstpage_image] =>[orig_patent_app_number] => 10864459 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/864459
Apparatus and method for initializing coprocessor for use in system comprised of main processor and coprocessor Jun 9, 2004 Issued
Array ( [id] => 7601911 [patent_doc_number] => 07237133 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-26 [patent_title] => 'Power supply control circuit for memories, method thereof and apparatus equipped with memories' [patent_app_type] => utility [patent_app_number] => 10/864468 [patent_app_country] => US [patent_app_date] => 2004-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2406 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/237/07237133.pdf [firstpage_image] =>[orig_patent_app_number] => 10864468 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/864468
Power supply control circuit for memories, method thereof and apparatus equipped with memories Jun 9, 2004 Issued
Array ( [id] => 7057379 [patent_doc_number] => 20050278554 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-15 [patent_title] => 'System and method for routing data and power to external devices' [patent_app_type] => utility [patent_app_number] => 10/865018 [patent_app_country] => US [patent_app_date] => 2004-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2225 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0278/20050278554.pdf [firstpage_image] =>[orig_patent_app_number] => 10865018 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/865018
System and method for routing data and power to external devices Jun 9, 2004 Issued
Array ( [id] => 7255305 [patent_doc_number] => 20050273588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-08 [patent_title] => 'Bootstrap method and apparatus with plural interchangeable boot code images' [patent_app_type] => utility [patent_app_number] => 10/863425 [patent_app_country] => US [patent_app_date] => 2004-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4923 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0273/20050273588.pdf [firstpage_image] =>[orig_patent_app_number] => 10863425 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/863425
Bootstrap method and apparatus with plural interchangeable boot code images Jun 7, 2004 Abandoned
Array ( [id] => 485777 [patent_doc_number] => 07225328 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-29 [patent_title] => 'Maintenance terminal of disk array device' [patent_app_type] => utility [patent_app_number] => 10/849120 [patent_app_country] => US [patent_app_date] => 2004-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 4877 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/225/07225328.pdf [firstpage_image] =>[orig_patent_app_number] => 10849120 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/849120
Maintenance terminal of disk array device May 19, 2004 Issued
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