Search

Brieanna Tarah Larell Szafran

Examiner (ID: 5269, Phone: (571)270-7627 , Office: P/3765 )

Most Active Art Unit
3765
Art Unit(s)
3765, 3732
Total Applications
513
Issued Applications
144
Pending Applications
3
Abandoned Applications
359

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 609583 [patent_doc_number] => 07155622 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-26 [patent_title] => 'System and method for the management of power supplied over data lines' [patent_app_type] => utility [patent_app_number] => 10/477603 [patent_app_country] => US [patent_app_date] => 2003-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6675 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/155/07155622.pdf [firstpage_image] =>[orig_patent_app_number] => 10477603 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/477603
System and method for the management of power supplied over data lines May 14, 2003 Issued
Array ( [id] => 716987 [patent_doc_number] => 07058837 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-06 [patent_title] => 'Method and system for providing a message-time-ordering facility' [patent_app_type] => utility [patent_app_number] => 10/435970 [patent_app_country] => US [patent_app_date] => 2003-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6397 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/058/07058837.pdf [firstpage_image] =>[orig_patent_app_number] => 10435970 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/435970
Method and system for providing a message-time-ordering facility May 11, 2003 Issued
Array ( [id] => 7437231 [patent_doc_number] => 20040230857 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-18 [patent_title] => 'Method and apparatus for controlling clocks in a processor with mirrored units' [patent_app_type] => new [patent_app_number] => 10/436210 [patent_app_country] => US [patent_app_date] => 2003-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 4461 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20040230857.pdf [firstpage_image] =>[orig_patent_app_number] => 10436210 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/436210
Method and apparatus for controlling clocks in a processor with mirrored units May 11, 2003 Issued
Array ( [id] => 7385014 [patent_doc_number] => 20040221150 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-04 [patent_title] => 'System and method for virtualizing basic input/output system (BIOS) including BIOS run time services' [patent_app_type] => new [patent_app_number] => 10/428682 [patent_app_country] => US [patent_app_date] => 2003-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4573 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0221/20040221150.pdf [firstpage_image] =>[orig_patent_app_number] => 10428682 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/428682
System and method for virtualizing basic input/output system (BIOS) including BIOS run time services May 1, 2003 Issued
Array ( [id] => 1177850 [patent_doc_number] => 06760854 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-06 [patent_title] => 'Method and apparatus for handling a framing error at a serial interface by forcing invalid commands to be read upon determine the command is invalid' [patent_app_type] => B2 [patent_app_number] => 10/424397 [patent_app_country] => US [patent_app_date] => 2003-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1788 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/760/06760854.pdf [firstpage_image] =>[orig_patent_app_number] => 10424397 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/424397
Method and apparatus for handling a framing error at a serial interface by forcing invalid commands to be read upon determine the command is invalid Apr 27, 2003 Issued
Array ( [id] => 684845 [patent_doc_number] => 07085948 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-01 [patent_title] => 'Method, apparatus, and computer program product for implementing time synchronization correction in computer systems' [patent_app_type] => utility [patent_app_number] => 10/422660 [patent_app_country] => US [patent_app_date] => 2003-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2079 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/085/07085948.pdf [firstpage_image] =>[orig_patent_app_number] => 10422660 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/422660
Method, apparatus, and computer program product for implementing time synchronization correction in computer systems Apr 23, 2003 Issued
Array ( [id] => 503936 [patent_doc_number] => 07213142 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-01 [patent_title] => 'System and method to initialize registers with an EEPROM stored boot sequence' [patent_app_type] => utility [patent_app_number] => 10/421287 [patent_app_country] => US [patent_app_date] => 2003-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1611 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/213/07213142.pdf [firstpage_image] =>[orig_patent_app_number] => 10421287 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/421287
System and method to initialize registers with an EEPROM stored boot sequence Apr 21, 2003 Issued
Array ( [id] => 6771316 [patent_doc_number] => 20030217256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-20 [patent_title] => 'Method and apparatus for disabling defective components in a computer system' [patent_app_type] => new [patent_app_number] => 10/412998 [patent_app_country] => US [patent_app_date] => 2003-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5021 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20030217256.pdf [firstpage_image] =>[orig_patent_app_number] => 10412998 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/412998
Method and apparatus for disabling defective components in a computer system Apr 13, 2003 Issued
Array ( [id] => 7196582 [patent_doc_number] => 20040205369 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-14 [patent_title] => 'Method system and synchronization circuit for providing hardware component access to a set of data values without restriction' [patent_app_type] => new [patent_app_number] => 10/411864 [patent_app_country] => US [patent_app_date] => 2003-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3900 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20040205369.pdf [firstpage_image] =>[orig_patent_app_number] => 10411864 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/411864
Method, system and synchronization circuit for providing hardware component access to a set of data values without restriction Apr 9, 2003 Issued
Array ( [id] => 6866404 [patent_doc_number] => 20030191930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-09 [patent_title] => 'Internet-enabled device provisioning, upgrade and recovery mechanism' [patent_app_type] => new [patent_app_number] => 10/406205 [patent_app_country] => US [patent_app_date] => 2003-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4080 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0191/20030191930.pdf [firstpage_image] =>[orig_patent_app_number] => 10406205 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/406205
Internet-enabled device provisioning, upgrade and recovery mechanism Apr 3, 2003 Issued
Array ( [id] => 6866451 [patent_doc_number] => 20030191977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-09 [patent_title] => 'Clock signal generating circuit' [patent_app_type] => new [patent_app_number] => 10/406126 [patent_app_country] => US [patent_app_date] => 2003-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3295 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0191/20030191977.pdf [firstpage_image] =>[orig_patent_app_number] => 10406126 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/406126
Method and apparatus for generating a clock signal having a driven oscillator circuit formed with energy storage characteristics of a memory storage device Apr 2, 2003 Issued
Array ( [id] => 684841 [patent_doc_number] => 07085946 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-01 [patent_title] => 'Backup memory control unit with reduced current consumption having normal self-refresh and unsettled modes of operation' [patent_app_type] => utility [patent_app_number] => 10/395098 [patent_app_country] => US [patent_app_date] => 2003-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 6167 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/085/07085946.pdf [firstpage_image] =>[orig_patent_app_number] => 10395098 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/395098
Backup memory control unit with reduced current consumption having normal self-refresh and unsettled modes of operation Mar 24, 2003 Issued
Array ( [id] => 685477 [patent_doc_number] => 07082526 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-25 [patent_title] => 'Mechanism for intuitively invoking one or more auxiliary programs during a computer booting process' [patent_app_type] => utility [patent_app_number] => 10/390262 [patent_app_country] => US [patent_app_date] => 2003-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4786 [patent_no_of_claims] => 54 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/082/07082526.pdf [firstpage_image] =>[orig_patent_app_number] => 10390262 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/390262
Mechanism for intuitively invoking one or more auxiliary programs during a computer booting process Mar 13, 2003 Issued
Array ( [id] => 6806197 [patent_doc_number] => 20030233591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-18 [patent_title] => 'Power state sub-system and a method of changing the power state of a selected computer system' [patent_app_type] => new [patent_app_number] => 10/371180 [patent_app_country] => US [patent_app_date] => 2003-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3440 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0233/20030233591.pdf [firstpage_image] =>[orig_patent_app_number] => 10371180 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/371180
Power state sub-system and a method of changing the power state of a selected computer system Feb 23, 2003 Abandoned
Array ( [id] => 6661132 [patent_doc_number] => 20030135776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-17 [patent_title] => 'Method and arrangement for correcting data' [patent_app_type] => new [patent_app_number] => 10/345794 [patent_app_country] => US [patent_app_date] => 2003-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2188 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0135/20030135776.pdf [firstpage_image] =>[orig_patent_app_number] => 10345794 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/345794
Method for correcting data using temporally preceding data Jan 15, 2003 Issued
Array ( [id] => 702135 [patent_doc_number] => 07073050 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-04 [patent_title] => 'Method and system for reporting configuration data for queriable and non-queriable installed components' [patent_app_type] => utility [patent_app_number] => 10/346247 [patent_app_country] => US [patent_app_date] => 2003-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3827 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/073/07073050.pdf [firstpage_image] =>[orig_patent_app_number] => 10346247 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/346247
Method and system for reporting configuration data for queriable and non-queriable installed components Jan 15, 2003 Issued
Array ( [id] => 6831531 [patent_doc_number] => 20030182589 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-25 [patent_title] => 'Instruction conversion apparatus and instruction conversion method providing power control information, program and circuit for implementing the instruction conversion, and microprocessor for executing the converted instruction' [patent_app_type] => new [patent_app_number] => 10/342349 [patent_app_country] => US [patent_app_date] => 2003-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6337 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0182/20030182589.pdf [firstpage_image] =>[orig_patent_app_number] => 10342349 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/342349
Instruction conversion apparatus and instruction conversion method providing power control information, program and circuit for implementing the instruction conversion, and microprocessor for executing the converted instruction Jan 14, 2003 Issued
Array ( [id] => 7328892 [patent_doc_number] => 20040139360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-15 [patent_title] => 'Off mode for device' [patent_app_type] => new [patent_app_number] => 10/345900 [patent_app_country] => US [patent_app_date] => 2003-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4430 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0139/20040139360.pdf [firstpage_image] =>[orig_patent_app_number] => 10345900 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/345900
Off mode for device Jan 14, 2003 Abandoned
Array ( [id] => 995904 [patent_doc_number] => 06918029 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-12 [patent_title] => 'Method and system for executing conditional instructions using a test register address that points to a test register from which a test code is selected' [patent_app_type] => utility [patent_app_number] => 10/341590 [patent_app_country] => US [patent_app_date] => 2003-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4710 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/918/06918029.pdf [firstpage_image] =>[orig_patent_app_number] => 10341590 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/341590
Method and system for executing conditional instructions using a test register address that points to a test register from which a test code is selected Jan 13, 2003 Issued
Array ( [id] => 908474 [patent_doc_number] => 07337313 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-26 [patent_title] => 'Information device, storage medium and initial state restoration method' [patent_app_type] => utility [patent_app_number] => 10/337901 [patent_app_country] => US [patent_app_date] => 2003-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3657 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/337/07337313.pdf [firstpage_image] =>[orig_patent_app_number] => 10337901 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/337901
Information device, storage medium and initial state restoration method Jan 7, 2003 Issued
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