Search

Brieanna Tarah Larell Szafran

Examiner (ID: 5269, Phone: (571)270-7627 , Office: P/3765 )

Most Active Art Unit
3765
Art Unit(s)
3765, 3732
Total Applications
513
Issued Applications
144
Pending Applications
3
Abandoned Applications
359

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 685515 [patent_doc_number] => 07082545 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-25 [patent_title] => 'Method of and device for detecting cable connection' [patent_app_type] => utility [patent_app_number] => 09/971674 [patent_app_country] => US [patent_app_date] => 2001-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5274 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/082/07082545.pdf [firstpage_image] =>[orig_patent_app_number] => 09971674 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/971674
Method of and device for detecting cable connection Oct 8, 2001 Issued
Array ( [id] => 6819105 [patent_doc_number] => 20030070063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-10 [patent_title] => 'Configuration file caching' [patent_app_type] => new [patent_app_number] => 09/972258 [patent_app_country] => US [patent_app_date] => 2001-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3744 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20030070063.pdf [firstpage_image] =>[orig_patent_app_number] => 09972258 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/972258
Configuration file caching Oct 4, 2001 Abandoned
Array ( [id] => 975535 [patent_doc_number] => 06938176 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-08-30 [patent_title] => 'Method and apparatus for power management of graphics processors and subsystems that allow the subsystems to respond to accesses when subsystems are idle' [patent_app_type] => utility [patent_app_number] => 09/972414 [patent_app_country] => US [patent_app_date] => 2001-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 9208 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/938/06938176.pdf [firstpage_image] =>[orig_patent_app_number] => 09972414 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/972414
Method and apparatus for power management of graphics processors and subsystems that allow the subsystems to respond to accesses when subsystems are idle Oct 4, 2001 Issued
Array ( [id] => 6245471 [patent_doc_number] => 20020046355 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-18 [patent_title] => 'Electronic device and its power control method' [patent_app_type] => new [patent_app_number] => 09/970529 [patent_app_country] => US [patent_app_date] => 2001-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8701 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20020046355.pdf [firstpage_image] =>[orig_patent_app_number] => 09970529 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/970529
Electronic device and its power control method Oct 3, 2001 Issued
Array ( [id] => 623369 [patent_doc_number] => 07143299 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-11-28 [patent_title] => 'Method for power management of intelligent hardware' [patent_app_type] => utility [patent_app_number] => 09/956376 [patent_app_country] => US [patent_app_date] => 2001-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4780 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/143/07143299.pdf [firstpage_image] =>[orig_patent_app_number] => 09956376 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/956376
Method for power management of intelligent hardware Sep 17, 2001 Issued
Array ( [id] => 6722401 [patent_doc_number] => 20030056091 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-20 [patent_title] => 'Method of scheduling in a reconfigurable hardware architecture with multiple hardware configurations' [patent_app_type] => new [patent_app_number] => 09/953568 [patent_app_country] => US [patent_app_date] => 2001-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1805 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20030056091.pdf [firstpage_image] =>[orig_patent_app_number] => 09953568 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/953568
Method of scheduling in a reconfigurable hardware architecture with multiple hardware configurations Sep 13, 2001 Abandoned
Array ( [id] => 6862653 [patent_doc_number] => 20030093661 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-15 [patent_title] => 'Eeprom agent record' [patent_app_type] => new [patent_app_number] => 09/927150 [patent_app_country] => US [patent_app_date] => 2001-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2172 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20030093661.pdf [firstpage_image] =>[orig_patent_app_number] => 09927150 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/927150
Method and apparatus for booting an electronic device using a plurality of agent records and agent codes Aug 9, 2001 Issued
Array ( [id] => 6689823 [patent_doc_number] => 20030033549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'Data storage device and data saving method thereof' [patent_app_type] => new [patent_app_number] => 09/927828 [patent_app_country] => US [patent_app_date] => 2001-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2727 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20030033549.pdf [firstpage_image] =>[orig_patent_app_number] => 09927828 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/927828
Data storage device and data saving method thereof Aug 9, 2001 Abandoned
Array ( [id] => 6689789 [patent_doc_number] => 20030033515 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'Upgrading a bios' [patent_app_type] => new [patent_app_number] => 09/928162 [patent_app_country] => US [patent_app_date] => 2001-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2401 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20030033515.pdf [firstpage_image] =>[orig_patent_app_number] => 09928162 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/928162
Updating a BIOS image by replacing a portion of the BIOS image with a portion of another BIOS image Aug 9, 2001 Issued
Array ( [id] => 6746704 [patent_doc_number] => 20030023887 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-30 [patent_title] => 'Computer system with backup management for handling embedded processor failure' [patent_app_type] => new [patent_app_number] => 09/918027 [patent_app_country] => US [patent_app_date] => 2001-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2919 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20030023887.pdf [firstpage_image] =>[orig_patent_app_number] => 09918027 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/918027
Computer system with backup management for handling embedded processor failure Jul 29, 2001 Abandoned
Array ( [id] => 1004733 [patent_doc_number] => 06910142 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-21 [patent_title] => 'System for detection and routing of platform events in a multi-cell computer' [patent_app_type] => utility [patent_app_number] => 09/917413 [patent_app_country] => US [patent_app_date] => 2001-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3424 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/910/06910142.pdf [firstpage_image] =>[orig_patent_app_number] => 09917413 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/917413
System for detection and routing of platform events in a multi-cell computer Jul 27, 2001 Issued
Array ( [id] => 999136 [patent_doc_number] => 06915443 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-05 [patent_title] => 'System and method for adaptively adjusting clock skew in a variably loaded memory bus' [patent_app_type] => utility [patent_app_number] => 09/904814 [patent_app_country] => US [patent_app_date] => 2001-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 7043 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/915/06915443.pdf [firstpage_image] =>[orig_patent_app_number] => 09904814 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/904814
System and method for adaptively adjusting clock skew in a variably loaded memory bus Jul 12, 2001 Issued
Array ( [id] => 6757567 [patent_doc_number] => 20030005344 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-02 [patent_title] => 'Synchronizing data with a capture pulse and synchronizer' [patent_app_type] => new [patent_app_number] => 09/896882 [patent_app_country] => US [patent_app_date] => 2001-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5175 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20030005344.pdf [firstpage_image] =>[orig_patent_app_number] => 09896882 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/896882
Synchronizing data with a capture pulse and synchronizer Jun 28, 2001 Abandoned
Array ( [id] => 6656277 [patent_doc_number] => 20030009654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-09 [patent_title] => 'Computer system having a single processor equipped to serve as multiple logical processors for pre-boot software to execute pre-boot tasks in parallel' [patent_app_type] => new [patent_app_number] => 09/893718 [patent_app_country] => US [patent_app_date] => 2001-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6267 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20030009654.pdf [firstpage_image] =>[orig_patent_app_number] => 09893718 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/893718
Computer system having a single processor equipped to serve as multiple logical processors for pre-boot software to execute pre-boot tasks in parallel Jun 28, 2001 Abandoned
Array ( [id] => 6425858 [patent_doc_number] => 20020184540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'Power on/off strategy for in-vehicle multimedia devices using a single power switch' [patent_app_type] => new [patent_app_number] => 09/867885 [patent_app_country] => US [patent_app_date] => 2001-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2022 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20020184540.pdf [firstpage_image] =>[orig_patent_app_number] => 09867885 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/867885
Power on/off strategy for in-vehicle multimedia devices using a single power switch May 29, 2001 Abandoned
Array ( [id] => 1062276 [patent_doc_number] => 06854066 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-02-08 [patent_title] => 'Method and system to avoid battery sag by detecting momentary fluctuation in a periodic terminal voltage measurement and excluding the measurement from updated average terminal voltage' [patent_app_type] => utility [patent_app_number] => 09/870314 [patent_app_country] => US [patent_app_date] => 2001-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 7867 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/854/06854066.pdf [firstpage_image] =>[orig_patent_app_number] => 09870314 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/870314
Method and system to avoid battery sag by detecting momentary fluctuation in a periodic terminal voltage measurement and excluding the measurement from updated average terminal voltage May 28, 2001 Issued
Array ( [id] => 992769 [patent_doc_number] => 06920573 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-19 [patent_title] => 'Energy-conserving apparatus and operating system having multiple operating functions stored in keep-alive memory' [patent_app_type] => utility [patent_app_number] => 09/863177 [patent_app_country] => US [patent_app_date] => 2001-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 10019 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/920/06920573.pdf [firstpage_image] =>[orig_patent_app_number] => 09863177 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/863177
Energy-conserving apparatus and operating system having multiple operating functions stored in keep-alive memory May 22, 2001 Issued
Array ( [id] => 6460677 [patent_doc_number] => 20020178352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-28 [patent_title] => 'Firmware upgrade using address conversion' [patent_app_type] => new [patent_app_number] => 09/863103 [patent_app_country] => US [patent_app_date] => 2001-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2834 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20020178352.pdf [firstpage_image] =>[orig_patent_app_number] => 09863103 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/863103
Firmware upgrade using address conversion May 21, 2001 Abandoned
Array ( [id] => 6461092 [patent_doc_number] => 20020178386 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-28 [patent_title] => 'Modem and a controller thereof' [patent_app_type] => new [patent_app_number] => 09/861702 [patent_app_country] => US [patent_app_date] => 2001-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3266 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20020178386.pdf [firstpage_image] =>[orig_patent_app_number] => 09861702 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/861702
Modem and a controller thereof May 21, 2001 Abandoned
Array ( [id] => 7610002 [patent_doc_number] => 06842857 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-11 [patent_title] => 'Method and apparatus to concurrently boot multiple processors in a non-uniform-memory-access machine' [patent_app_type] => utility [patent_app_number] => 09/833337 [patent_app_country] => US [patent_app_date] => 2001-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3080 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/842/06842857.pdf [firstpage_image] =>[orig_patent_app_number] => 09833337 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/833337
Method and apparatus to concurrently boot multiple processors in a non-uniform-memory-access machine Apr 11, 2001 Issued
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