Brieanna Tarah Larell Szafran

Array ( [id] => 6161582 [patent_doc_number] => 20020147932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-10 [patent_title] => 'Controlling power and performance in a multiprocessing system' [patent_app_type] => new [patent_app_number] => 09/826986 [patent_app_country] => US [patent_app_date] => 2001-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4640 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0147/20020147932.pdf [firstpage_image] =>[orig_patent_app_number] => 09826986 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7065279 [patent_doc_number] => 20010044332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-22 [patent_title] => 'Information device, power-saving-mode switching method, and recording medium storing power-saving-mode switching program' [patent_app_type] => new [patent_app_number] => 09/809106 [patent_app_country] => US [patent_app_date] => 2001-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6214 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20010044332.pdf [firstpage_image] =>[orig_patent_app_number] => 09809106 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1017302 [patent_doc_number] => 06895522 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-17 [patent_title] => 'Method and apparatus for compensating duty cycle distortion in a data output signal from a memory device by delaying and distorting a reference clock' [patent_app_type] => utility [patent_app_number] => 09/809608 [patent_app_country] => US [patent_app_date] => 2001-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6198 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/895/06895522.pdf [firstpage_image] =>[orig_patent_app_number] => 09809608 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6389403 [patent_doc_number] => 20020120883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-29 [patent_title] => 'Synchronous to asynchronous to synchronous interface' [patent_app_type] => new [patent_app_number] => 09/794467 [patent_app_country] => US [patent_app_date] => 2001-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 6147 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20020120883.pdf [firstpage_image] =>[orig_patent_app_number] => 09794467 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1059035 [patent_doc_number] => 06857081 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-15 [patent_title] => 'Apparatus suitable for providing synchronized clock signals to a microelectronic device' [patent_app_type] => utility [patent_app_number] => 09/771755 [patent_app_country] => US [patent_app_date] => 2001-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1332 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/857/06857081.pdf [firstpage_image] =>[orig_patent_app_number] => 09771755 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5861384 [patent_doc_number] => 20020124197 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-05 [patent_title] => 'Method to associate and respond to a requirement for high performance operation of a notebook computer' [patent_app_type] => new [patent_app_number] => 09/752131 [patent_app_country] => US [patent_app_date] => 2000-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 6782 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20020124197.pdf [firstpage_image] =>[orig_patent_app_number] => 09752131 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5926352 [patent_doc_number] => 20020116554 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-22 [patent_title] => 'Method and apparatus to directly access a peripheral device when central processor operations are suspended' [patent_app_type] => new [patent_app_number] => 09/748921 [patent_app_country] => US [patent_app_date] => 2000-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5236 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0116/20020116554.pdf [firstpage_image] =>[orig_patent_app_number] => 09748921 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6085733 [patent_doc_number] => 20020083354 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-27 [patent_title] => 'Method and apparatus for thermal throttling of clocks' [patent_app_type] => new [patent_app_number] => 09/749088 [patent_app_country] => US [patent_app_date] => 2000-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6190 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20020083354.pdf [firstpage_image] =>[orig_patent_app_number] => 09749088 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6085737 [patent_doc_number] => 20020083357 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-27 [patent_title] => 'Method and apparatus for lossless resume capability with peripheral devices' [patent_app_type] => new [patent_app_number] => 09/745321 [patent_app_country] => US [patent_app_date] => 2000-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1937 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20020083357.pdf [firstpage_image] =>[orig_patent_app_number] => 09745321 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6085626 [patent_doc_number] => 20020083315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-27 [patent_title] => 'System for storing optional modules in non-volatile memory for expansion ROM' [patent_app_type] => new [patent_app_number] => 09/747530 [patent_app_country] => US [patent_app_date] => 2000-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3724 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20020083315.pdf [firstpage_image] =>[orig_patent_app_number] => 09747530 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1040030 [patent_doc_number] => 06874083 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-29 [patent_title] => 'Method and apparatus to ensure proper voltage and frequency configuration signals are defined before applying power to processor' [patent_app_type] => utility [patent_app_number] => 09/746168 [patent_app_country] => US [patent_app_date] => 2000-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6137 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/874/06874083.pdf [firstpage_image] =>[orig_patent_app_number] => 09746168 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1183736 [patent_doc_number] => 06751743 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-15 [patent_title] => 'Method and apparatus for selecting a first clock and second clock for first and second devices respectively from an up-converted clock and an aligned clock for synchronization' [patent_app_type] => B1 [patent_app_number] => 09/746323 [patent_app_country] => US [patent_app_date] => 2000-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 7833 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/751/06751743.pdf [firstpage_image] =>[orig_patent_app_number] => 09746323 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7625697 [patent_doc_number] => 06769070 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-27 [patent_title] => 'Standby circuit for digital display monitor' [patent_app_type] => B1 [patent_app_number] => 09/745749 [patent_app_country] => US [patent_app_date] => 2000-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5640 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/769/06769070.pdf [firstpage_image] =>[orig_patent_app_number] => 09745749 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6134241 [patent_doc_number] => 20020078388 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-20 [patent_title] => 'Remote power up control for delivery of information' [patent_app_type] => new [patent_app_number] => 09/745631 [patent_app_country] => US [patent_app_date] => 2000-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1914 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20020078388.pdf [firstpage_image] =>[orig_patent_app_number] => 09745631 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1236388 [patent_doc_number] => 06694439 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-17 [patent_title] => 'Apparatus for providing communications data over a power bus having a total current that is the absolute value of the most negative current excursion during communication' [patent_app_type] => B2 [patent_app_number] => 09/737509 [patent_app_country] => US [patent_app_date] => 2000-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2052 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/694/06694439.pdf [firstpage_image] =>[orig_patent_app_number] => 09737509 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1206979 [patent_doc_number] => 06721897 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-13 [patent_title] => 'Bus control circuit effecting timing control using cycle registers for respective cycles holding signal levels corresponding to bus control signals that are output by arrangement of signal level' [patent_app_type] => B1 [patent_app_number] => 09/735496 [patent_app_country] => US [patent_app_date] => 2000-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 9969 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/721/06721897.pdf [firstpage_image] =>[orig_patent_app_number] => 09735496 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6035503 [patent_doc_number] => 20020019901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-14 [patent_title] => 'Computer and method for maximizing an advertising effect' [patent_app_type] => new [patent_app_number] => 09/735505 [patent_app_country] => US [patent_app_date] => 2000-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3429 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20020019901.pdf [firstpage_image] =>[orig_patent_app_number] => 09735505 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1197096 [patent_doc_number] => 06732286 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-04 [patent_title] => 'High latency timing circuit' [patent_app_type] => B1 [patent_app_number] => 09/725818 [patent_app_country] => US [patent_app_date] => 2000-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4656 [patent_no_of_claims] => 100 [patent_no_of_ind_claims] => 20 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/732/06732286.pdf [firstpage_image] =>[orig_patent_app_number] => 09725818 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1192618 [patent_doc_number] => 06735709 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-11 [patent_title] => 'Method of timing calibration using slower data rate pattern' [patent_app_type] => B1 [patent_app_number] => 09/708440 [patent_app_country] => US [patent_app_date] => 2000-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 7087 [patent_no_of_claims] => 186 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/735/06735709.pdf [firstpage_image] =>[orig_patent_app_number] => 09708440 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1185968 [patent_doc_number] => 06745337 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-01 [patent_title] => 'Glitch detection circuit for outputting a signal indicative of a glitch on a strobe signal and initializing an edge detection circuit in response to a control signal' [patent_app_type] => B1 [patent_app_number] => 09/690118 [patent_app_country] => US [patent_app_date] => 2000-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4332 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/745/06745337.pdf [firstpage_image] =>[orig_patent_app_number] => 09690118 [rel_patent_id] =>[rel_patent_doc_number] =>)