Search

Brigitte A. Paterson

Examiner (ID: 17368, Phone: (571)272-1752 , Office: P/2812 )

Most Active Art Unit
2812
Art Unit(s)
2812, 2896
Total Applications
448
Issued Applications
314
Pending Applications
62
Abandoned Applications
94

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9134997 [patent_doc_number] => 20130295712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-07 [patent_title] => 'METHODS OF TEXTURING SURFACES FOR CONTROLLED REFLECTION' [patent_app_type] => utility [patent_app_number] => 13/463448 [patent_app_country] => US [patent_app_date] => 2012-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8322 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13463448 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/463448
METHODS OF TEXTURING SURFACES FOR CONTROLLED REFLECTION May 2, 2012 Abandoned
Array ( [id] => 8483344 [patent_doc_number] => 20120282751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-08 [patent_title] => 'METHODS OF FABRICATING SEMICONDUCTOR DEVICES INCLUDING FINE PATTERNS' [patent_app_type] => utility [patent_app_number] => 13/463342 [patent_app_country] => US [patent_app_date] => 2012-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 11429 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13463342 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/463342
METHODS OF FABRICATING SEMICONDUCTOR DEVICES INCLUDING FINE PATTERNS May 2, 2012 Abandoned
Array ( [id] => 9131920 [patent_doc_number] => 20130292633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-07 [patent_title] => 'ETCH BIAS HOMOGENIZATION' [patent_app_type] => utility [patent_app_number] => 13/463245 [patent_app_country] => US [patent_app_date] => 2012-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8574 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13463245 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/463245
Etch bias homogenization May 2, 2012 Issued
Array ( [id] => 9135006 [patent_doc_number] => 20130295720 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-07 [patent_title] => 'METHODS FOR MANUFACTURING A CHIP PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/461859 [patent_app_country] => US [patent_app_date] => 2012-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 12876 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13461859 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/461859
Methods for manufacturing a chip package May 1, 2012 Issued
Array ( [id] => 8489621 [patent_doc_number] => 20120289028 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-15 [patent_title] => 'WAFER DIVIDING METHOD' [patent_app_type] => utility [patent_app_number] => 13/462229 [patent_app_country] => US [patent_app_date] => 2012-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3802 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13462229 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/462229
Wafer dividing method May 1, 2012 Issued
Array ( [id] => 11645296 [patent_doc_number] => 09666690 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-30 [patent_title] => 'Integrated circuit and method for fabricating the same having a replacement gate structure' [patent_app_type] => utility [patent_app_number] => 13/462619 [patent_app_country] => US [patent_app_date] => 2012-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2687 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13462619 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/462619
Integrated circuit and method for fabricating the same having a replacement gate structure May 1, 2012 Issued
Array ( [id] => 9134984 [patent_doc_number] => 20130295699 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-07 [patent_title] => 'METHOD FOR TESTING THROUGH-SILICON-VIA (TSV) STRUCTURES' [patent_app_type] => utility [patent_app_number] => 13/461795 [patent_app_country] => US [patent_app_date] => 2012-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2808 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13461795 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/461795
Method for testing through-silicon-via (TSV) structures May 1, 2012 Issued
Array ( [id] => 9135052 [patent_doc_number] => 20130295767 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-07 [patent_title] => 'INCREASED TRANSISTOR PERFORMANCE BY IMPLEMENTING AN ADDITIONAL CLEANING PROCESS IN A STRESS LINER APPROACH' [patent_app_type] => utility [patent_app_number] => 13/462246 [patent_app_country] => US [patent_app_date] => 2012-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7564 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13462246 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/462246
INCREASED TRANSISTOR PERFORMANCE BY IMPLEMENTING AN ADDITIONAL CLEANING PROCESS IN A STRESS LINER APPROACH May 1, 2012 Abandoned
Array ( [id] => 8963631 [patent_doc_number] => 20130203233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-08 [patent_title] => 'MANUFACTURING METHOD OF MEMORY CAPACITOR WITHOUT MOAT STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/461921 [patent_app_country] => US [patent_app_date] => 2012-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1979 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13461921 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/461921
MANUFACTURING METHOD OF MEMORY CAPACITOR WITHOUT MOAT STRUCTURE May 1, 2012 Abandoned
Array ( [id] => 10882354 [patent_doc_number] => 08906731 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-09 [patent_title] => 'Patterning slit sheet assembly, organic layer deposition apparatus, method of manufacturing organic light-emitting display apparatus, and the organic light-emitting display apparatus' [patent_app_type] => utility [patent_app_number] => 13/461669 [patent_app_country] => US [patent_app_date] => 2012-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 10322 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 440 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13461669 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/461669
Patterning slit sheet assembly, organic layer deposition apparatus, method of manufacturing organic light-emitting display apparatus, and the organic light-emitting display apparatus Apr 30, 2012 Issued
Array ( [id] => 9135033 [patent_doc_number] => 20130295748 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-07 [patent_title] => 'METHOD OF UNIFORM SELENIZATION AND SULFERIZATION IN A TUBE FURNACE' [patent_app_type] => utility [patent_app_number] => 13/461495 [patent_app_country] => US [patent_app_date] => 2012-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8038 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13461495 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/461495
Method of uniform selenization and sulfurization in a tube furnace Apr 30, 2012 Issued
Array ( [id] => 8502641 [patent_doc_number] => 20120302048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-29 [patent_title] => 'PRE OR POST-IMPLANT PLASMA TREATMENT FOR PLASMA IMMERSED ION IMPLANTATION PROCESS' [patent_app_type] => utility [patent_app_number] => 13/461476 [patent_app_country] => US [patent_app_date] => 2012-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5621 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13461476 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/461476
PRE OR POST-IMPLANT PLASMA TREATMENT FOR PLASMA IMMERSED ION IMPLANTATION PROCESS Apr 30, 2012 Abandoned
Array ( [id] => 8496007 [patent_doc_number] => 20120295415 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-22 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/461616 [patent_app_country] => US [patent_app_date] => 2012-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 7423 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13461616 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/461616
Method of manufacturing semiconductor device Apr 30, 2012 Issued
Array ( [id] => 8347403 [patent_doc_number] => 20120208333 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-16 [patent_title] => 'METHOD FOR FABRICATING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/360051 [patent_app_country] => US [patent_app_date] => 2012-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5935 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13360051 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/360051
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE Jan 26, 2012 Abandoned
Array ( [id] => 8814710 [patent_doc_number] => 20130115755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-09 [patent_title] => 'METHOD OF SEPARATING SEMICONDUCTOR DIE USING MATERIAL MODIFICATION' [patent_app_type] => utility [patent_app_number] => 13/359548 [patent_app_country] => US [patent_app_date] => 2012-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 10658 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13359548 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/359548
Method of separating semiconductor die using material modification Jan 26, 2012 Issued
Array ( [id] => 9254498 [patent_doc_number] => 08617911 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-31 [patent_title] => 'Method for forming coating film on facet of semiconductor optical device' [patent_app_type] => utility [patent_app_number] => 13/359604 [patent_app_country] => US [patent_app_date] => 2012-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 32 [patent_no_of_words] => 7884 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13359604 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/359604
Method for forming coating film on facet of semiconductor optical device Jan 26, 2012 Issued
Array ( [id] => 9344963 [patent_doc_number] => 08664110 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-04 [patent_title] => 'Method for forming semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/359061 [patent_app_country] => US [patent_app_date] => 2012-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 10801 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13359061 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/359061
Method for forming semiconductor device Jan 25, 2012 Issued
Array ( [id] => 8617787 [patent_doc_number] => 20130023099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-24 [patent_title] => 'METHOD OF MANUFACTURING NONVOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/358633 [patent_app_country] => US [patent_app_date] => 2012-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 5570 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13358633 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/358633
Method of manufacturing nonvolatile semiconductor memory device Jan 25, 2012 Issued
Array ( [id] => 8509709 [patent_doc_number] => 20120309117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-06 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/358868 [patent_app_country] => US [patent_app_date] => 2012-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2764 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13358868 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/358868
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Jan 25, 2012 Abandoned
Array ( [id] => 8509773 [patent_doc_number] => 20120309181 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-06 [patent_title] => 'PROCESS FOR DEPOSITING ELECTRODE WITH HIGH EFFECTIVE WORK FUNCTION' [patent_app_type] => utility [patent_app_number] => 13/359385 [patent_app_country] => US [patent_app_date] => 2012-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6404 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13359385 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/359385
Process for depositing electrode with high effective work function Jan 25, 2012 Issued
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