
Brigitte A. Paterson
Examiner (ID: 7375, Phone: (571)272-1752 , Office: P/2812 )
| Most Active Art Unit | 2812 |
| Art Unit(s) | 2812, 2896 |
| Total Applications | 470 |
| Issued Applications | 324 |
| Pending Applications | 60 |
| Abandoned Applications | 96 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10857328
[patent_doc_number] => 08883523
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-11-11
[patent_title] => 'Method for detecting pattern offset amount of exposed regions and detecting mark'
[patent_app_type] => utility
[patent_app_number] => 13/107064
[patent_app_country] => US
[patent_app_date] => 2011-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 5336
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 367
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13107064
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/107064 | Method for detecting pattern offset amount of exposed regions and detecting mark | May 12, 2011 | Issued |
Array
(
[id] => 9127034
[patent_doc_number] => 08574983
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-11-05
[patent_title] => 'Method for fabricating a DRAM capacitor having increased thermal and chemical stability'
[patent_app_type] => utility
[patent_app_number] => 13/107081
[patent_app_country] => US
[patent_app_date] => 2011-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 6328
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13107081
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/107081 | Method for fabricating a DRAM capacitor having increased thermal and chemical stability | May 12, 2011 | Issued |
Array
(
[id] => 11585922
[patent_doc_number] => 09640574
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-05-02
[patent_title] => 'Image sensor circuit, system, and method'
[patent_app_type] => utility
[patent_app_number] => 13/029665
[patent_app_country] => US
[patent_app_date] => 2011-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 27
[patent_no_of_words] => 6941
[patent_no_of_claims] => 4
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13029665
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/029665 | Image sensor circuit, system, and method | Feb 16, 2011 | Issued |
Array
(
[id] => 8502637
[patent_doc_number] => 20120302045
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-11-29
[patent_title] => 'METHOD FOR PRODUCING MOSAIC DIAMOND'
[patent_app_type] => utility
[patent_app_number] => 13/515991
[patent_app_country] => US
[patent_app_date] => 2010-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 8333
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13515991
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/515991 | METHOD FOR PRODUCING MOSAIC DIAMOND | Dec 14, 2010 | Abandoned |
Array
(
[id] => 8430310
[patent_doc_number] => 20120252184
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-10-04
[patent_title] => 'VARIABLE RESISTANCE ELEMENT AND MANUFACTURING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/515761
[patent_app_country] => US
[patent_app_date] => 2010-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 16374
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13515761
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/515761 | Variable resistance element and manufacturing method thereof | Dec 13, 2010 | Issued |
Array
(
[id] => 8370674
[patent_doc_number] => 20120220063
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-08-30
[patent_title] => 'VERTICAL-STRUCTURE SEMICONDUCTOR LIGHT EMITTING ELEMENT AND A PRODUCTION METHOD THEREFOR'
[patent_app_type] => utility
[patent_app_number] => 13/505618
[patent_app_country] => US
[patent_app_date] => 2010-11-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 10941
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13505618
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/505618 | Vertical-structure semiconductor light emitting element and a production method therefor | Nov 22, 2010 | Issued |
Array
(
[id] => 9676706
[patent_doc_number] => 08815615
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-08-26
[patent_title] => 'Method for copper hillock reduction'
[patent_app_type] => utility
[patent_app_number] => 12/938158
[patent_app_country] => US
[patent_app_date] => 2010-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 3936
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 185
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12938158
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/938158 | Method for copper hillock reduction | Nov 1, 2010 | Issued |
Array
(
[id] => 9524062
[patent_doc_number] => 08748326
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-06-10
[patent_title] => 'Device and method for forming low-temperature polysilicon film'
[patent_app_type] => utility
[patent_app_number] => 13/505721
[patent_app_country] => US
[patent_app_date] => 2010-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 5826
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13505721
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/505721 | Device and method for forming low-temperature polysilicon film | Oct 13, 2010 | Issued |
Array
(
[id] => 8381897
[patent_doc_number] => 20120225519
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-09-06
[patent_title] => 'PREPARATION OF SOLAR MODULES'
[patent_app_type] => utility
[patent_app_number] => 13/498225
[patent_app_country] => US
[patent_app_date] => 2010-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 5615
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13498225
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/498225 | PREPARATION OF SOLAR MODULES | Sep 29, 2010 | Abandoned |
Array
(
[id] => 8347458
[patent_doc_number] => 20120208376
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-08-16
[patent_title] => 'METHOD OF FORMING SILICON NITRIDE FILM AND METHOD OF MANUFACTURING SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/499445
[patent_app_country] => US
[patent_app_date] => 2010-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 11506
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13499445
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/499445 | METHOD OF FORMING SILICON NITRIDE FILM AND METHOD OF MANUFACTURING SEMICONDUCTOR MEMORY DEVICE | Sep 27, 2010 | Abandoned |
Array
(
[id] => 8430323
[patent_doc_number] => 20120252198
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-10-04
[patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 13/061296
[patent_app_country] => US
[patent_app_date] => 2010-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13061296
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/061296 | Method for manufacturing a high-performance semiconductor structure with a replacement gate process and a stress memorization technique | Sep 25, 2010 | Issued |
Array
(
[id] => 8210309
[patent_doc_number] => 20120129343
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-24
[patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/387097
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0129/20120129343.pdf
[firstpage_image] =>[orig_patent_app_number] => 13387097
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/387097 | Method of manufacturing an ohmic electrode containing titanium, aluminum and silicon on a silicon carbide surface | Jul 29, 2010 | Issued |
Array
(
[id] => 10898025
[patent_doc_number] => 08921239
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-12-30
[patent_title] => 'Process for recycling a substrate'
[patent_app_type] => utility
[patent_app_number] => 13/516199
[patent_app_country] => US
[patent_app_date] => 2009-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13516199
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/516199 | Process for recycling a substrate | Dec 14, 2009 | Issued |