Search

Brigitte A. Paterson

Examiner (ID: 17368, Phone: (571)272-1752 , Office: P/2812 )

Most Active Art Unit
2812
Art Unit(s)
2812, 2896
Total Applications
448
Issued Applications
314
Pending Applications
62
Abandoned Applications
94

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18929297 [patent_doc_number] => 20240032301 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => NOR-TYPE MEMORY DEVICE, METHOD OF MANUFACTURING NOR-TYPE MEMORY DEVICE, AND ELECTRONIC APPARATUS INCLUDING MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/043324 [patent_app_country] => US [patent_app_date] => 2022-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7846 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -34 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18043324 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/043324
NOR-TYPE MEMORY DEVICE, METHOD OF MANUFACTURING NOR-TYPE MEMORY DEVICE, AND ELECTRONIC APPARATUS INCLUDING MEMORY DEVICE Feb 21, 2022 Pending
Array ( [id] => 17645299 [patent_doc_number] => 20220173038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => BONDING ALIGNMENT MARKS AT BONDING INTERFACE [patent_app_type] => utility [patent_app_number] => 17/673795 [patent_app_country] => US [patent_app_date] => 2022-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10732 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17673795 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/673795
BONDING ALIGNMENT MARKS AT BONDING INTERFACE Feb 16, 2022 Pending
Array ( [id] => 18572627 [patent_doc_number] => 20230262965 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => MEMORY STRUCTURE AND METHOD OF FORMING THEREOF [patent_app_type] => utility [patent_app_number] => 17/651575 [patent_app_country] => US [patent_app_date] => 2022-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7200 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17651575 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/651575
Memory structure and method of forming thereof Feb 16, 2022 Issued
Array ( [id] => 17566655 [patent_doc_number] => 20220130804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-28 [patent_title] => DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/517296 [patent_app_country] => US [patent_app_date] => 2021-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18577 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17517296 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/517296
DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME Nov 1, 2021 Pending
Array ( [id] => 18321053 [patent_doc_number] => 20230119181 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-20 [patent_title] => Semiconductor Device and Method of Forming RDL Hybrid Interposer Substrate [patent_app_type] => utility [patent_app_number] => 17/451166 [patent_app_country] => US [patent_app_date] => 2021-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5692 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17451166 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/451166
Semiconductor Device and Method of Forming RDL Hybrid Interposer Substrate Oct 17, 2021 Pending
Array ( [id] => 17661106 [patent_doc_number] => 20220181571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => ENERGY LEVELS AND DEVICE STRUCTURES FOR PLASMONIC OLEDS [patent_app_type] => utility [patent_app_number] => 17/451032 [patent_app_country] => US [patent_app_date] => 2021-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13942 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17451032 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/451032
ENERGY LEVELS AND DEVICE STRUCTURES FOR PLASMONIC OLEDS Oct 14, 2021 Pending
Array ( [id] => 17615342 [patent_doc_number] => 20220157622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => CHIP PACKAGING METHOD AND CHIP PACKAGE UNIT [patent_app_type] => utility [patent_app_number] => 17/485339 [patent_app_country] => US [patent_app_date] => 2021-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3173 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17485339 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/485339
CHIP PACKAGING METHOD AND CHIP PACKAGE UNIT Sep 24, 2021 Abandoned
Array ( [id] => 17752671 [patent_doc_number] => 20220230876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-21 [patent_title] => PREPARATION METHOD FOR CAPACITOR STRUCTURE, CAPACITOR STRUCTURE, AND MEMORY [patent_app_type] => utility [patent_app_number] => 17/444690 [patent_app_country] => US [patent_app_date] => 2021-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6511 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17444690 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/444690
Preparation method for capacitor structure, capacitor structure, and memory Aug 8, 2021 Issued
Array ( [id] => 19221615 [patent_doc_number] => 20240186319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => TRANSISTOR ARRAY AND METHOD FOR MANUFACTURING SAME, AND SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 17/784707 [patent_app_country] => US [patent_app_date] => 2021-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10799 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17784707 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/784707
TRANSISTOR ARRAY AND METHOD FOR MANUFACTURING SAME, AND SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME Aug 5, 2021 Pending
Array ( [id] => 17232357 [patent_doc_number] => 20210358914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => METHOD FOR FORMING CAPACITOR OPENING HOLE AND METHOD FOR FORMING MEMORY CAPACITOR [patent_app_type] => utility [patent_app_number] => 17/379064 [patent_app_country] => US [patent_app_date] => 2021-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6208 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17379064 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/379064
Method for forming capacitor opening hole and method for forming memory capacitor Jul 18, 2021 Issued
Array ( [id] => 18653273 [patent_doc_number] => 20230299113 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => SOLID-STATE IMAGING DEVICE AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/040166 [patent_app_country] => US [patent_app_date] => 2021-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9459 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18040166 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/040166
SOLID-STATE IMAGING DEVICE AND ELECTRONIC DEVICE Jul 1, 2021 Pending
Array ( [id] => 18585980 [patent_doc_number] => 20230268245 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => INSULATING SUBSTRATE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/010104 [patent_app_country] => US [patent_app_date] => 2021-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7108 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18010104 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/010104
INSULATING SUBSTRATE AND MANUFACTURING METHOD THEREOF Jun 28, 2021 Pending
Array ( [id] => 17263217 [patent_doc_number] => 20210376202 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => MICRO LIGHT EMITTING DIODE AND METHOD FOR MANUFACTURING THE SAME, AND MICRO LIGHT EMITTING DIODE MODULE [patent_app_type] => utility [patent_app_number] => 17/343126 [patent_app_country] => US [patent_app_date] => 2021-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3921 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17343126 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/343126
MICRO LIGHT EMITTING DIODE AND METHOD FOR MANUFACTURING THE SAME, AND MICRO LIGHT EMITTING DIODE MODULE Jun 8, 2021 Abandoned
Array ( [id] => 17115743 [patent_doc_number] => 20210296340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => SEMICONDUCTOR MEMORY DEVICE INCLUDING AN ASYMMETRICAL MEMORY CORE REGION [patent_app_type] => utility [patent_app_number] => 17/338822 [patent_app_country] => US [patent_app_date] => 2021-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7568 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17338822 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/338822
SEMICONDUCTOR MEMORY DEVICE INCLUDING AN ASYMMETRICAL MEMORY CORE REGION Jun 3, 2021 Pending
Array ( [id] => 20374983 [patent_doc_number] => 12482424 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-25 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 17/298633 [patent_app_country] => US [patent_app_date] => 2021-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 1194 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 331 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17298633 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/298633
Display device May 9, 2021 Issued
Array ( [id] => 20260738 [patent_doc_number] => 12433109 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-30 [patent_title] => Display substrate, preparation method thereof, and display apparatus [patent_app_type] => utility [patent_app_number] => 17/637456 [patent_app_country] => US [patent_app_date] => 2021-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 34 [patent_no_of_words] => 19387 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 369 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17637456 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/637456
Display substrate, preparation method thereof, and display apparatus Apr 27, 2021 Issued
Array ( [id] => 18406968 [patent_doc_number] => 20230168319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-01 [patent_title] => IN-PLANE MAGNETIZED FILM MULTILAYER STRUCTURE, HARD BIAS LAYER, AND MAGNETORESISTIVE EFFECT ELEMENT [patent_app_type] => utility [patent_app_number] => 17/921005 [patent_app_country] => US [patent_app_date] => 2021-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13475 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17921005 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/921005
IN-PLANE MAGNETIZED FILM MULTILAYER STRUCTURE, HARD BIAS LAYER, AND MAGNETORESISTIVE EFFECT ELEMENT Apr 27, 2021 Abandoned
Array ( [id] => 18488541 [patent_doc_number] => 20230215889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => IMAGING ELEMENT AND IMAGING DEVICE [patent_app_type] => utility [patent_app_number] => 17/998990 [patent_app_country] => US [patent_app_date] => 2021-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16131 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17998990 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/998990
IMAGING ELEMENT AND IMAGING DEVICE Apr 6, 2021 Pending
Array ( [id] => 16981685 [patent_doc_number] => 20210225922 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => GERMANIUM-SILICON LIGHT SENSING APPARATUS II [patent_app_type] => utility [patent_app_number] => 17/208478 [patent_app_country] => US [patent_app_date] => 2021-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 31060 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17208478 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/208478
GERMANIUM-SILICON LIGHT SENSING APPARATUS II Mar 21, 2021 Abandoned
Array ( [id] => 18725578 [patent_doc_number] => 20230339745 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => METHOD FOR MANUFACTURING A MICROMECHANICAL SENSOR [patent_app_type] => utility [patent_app_number] => 17/792171 [patent_app_country] => US [patent_app_date] => 2021-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7050 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17792171 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/792171
METHOD FOR MANUFACTURING A MICROMECHANICAL SENSOR Mar 21, 2021 Pending
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