Search

Brook Kebede

Examiner (ID: 11329, Phone: (571)272-1862 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2894, 2823, 2818
Total Applications
2153
Issued Applications
1883
Pending Applications
114
Abandoned Applications
188

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1371804 [patent_doc_number] => 06562699 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-13 [patent_title] => 'Process for manufacturing semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/202714 [patent_app_country] => US [patent_app_date] => 1998-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 26 [patent_no_of_words] => 8094 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/562/06562699.pdf [firstpage_image] =>[orig_patent_app_number] => 09202714 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/202714
Process for manufacturing semiconductor device Dec 20, 1998 Issued
09/210994 POSITION DETECTION MARK AND POSITION DETECTION METHOD Dec 14, 1998 Abandoned
Array ( [id] => 4235248 [patent_doc_number] => 06165849 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Method of manufacturing mosfet with differential gate oxide thickness on the same IC chip' [patent_app_type] => 1 [patent_app_number] => 9/205616 [patent_app_country] => US [patent_app_date] => 1998-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 12 [patent_no_of_words] => 1779 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/165/06165849.pdf [firstpage_image] =>[orig_patent_app_number] => 205616 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/205616
Method of manufacturing mosfet with differential gate oxide thickness on the same IC chip Dec 3, 1998 Issued
Array ( [id] => 4162625 [patent_doc_number] => 06157055 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-05 [patent_title] => 'Semiconductor memory device having a long data retention time with the increase in leakage current suppressed' [patent_app_type] => 1 [patent_app_number] => 9/185633 [patent_app_country] => US [patent_app_date] => 1998-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 4256 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/157/06157055.pdf [firstpage_image] =>[orig_patent_app_number] => 185633 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/185633
Semiconductor memory device having a long data retention time with the increase in leakage current suppressed Nov 3, 1998 Issued
Array ( [id] => 4293848 [patent_doc_number] => 06184079 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'Method for fabricating a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/183441 [patent_app_country] => US [patent_app_date] => 1998-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 2775 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/184/06184079.pdf [firstpage_image] =>[orig_patent_app_number] => 183441 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/183441
Method for fabricating a semiconductor device Oct 29, 1998 Issued
Array ( [id] => 4102079 [patent_doc_number] => 06100172 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Method for forming a horizontal surface spacer and devices formed thereby' [patent_app_type] => 1 [patent_app_number] => 9/182173 [patent_app_country] => US [patent_app_date] => 1998-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3452 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/100/06100172.pdf [firstpage_image] =>[orig_patent_app_number] => 182173 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/182173
Method for forming a horizontal surface spacer and devices formed thereby Oct 28, 1998 Issued
Array ( [id] => 6898571 [patent_doc_number] => 20010046736 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-29 [patent_title] => 'METHOD FOR MANUFACTURING A BURIED GATE' [patent_app_type] => new [patent_app_number] => 09/179311 [patent_app_country] => US [patent_app_date] => 1998-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3988 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20010046736.pdf [firstpage_image] =>[orig_patent_app_number] => 09179311 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/179311
Method for manufacturing a buried gate Oct 26, 1998 Issued
Array ( [id] => 4356458 [patent_doc_number] => 06174735 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-16 [patent_title] => 'Method of manufacturing ferroelectric memory device useful for preventing hydrogen line degradation' [patent_app_type] => 1 [patent_app_number] => 9/177392 [patent_app_country] => US [patent_app_date] => 1998-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 60 [patent_no_of_words] => 7008 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/174/06174735.pdf [firstpage_image] =>[orig_patent_app_number] => 177392 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/177392
Method of manufacturing ferroelectric memory device useful for preventing hydrogen line degradation Oct 22, 1998 Issued
Array ( [id] => 7093215 [patent_doc_number] => 20010034122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-25 [patent_title] => 'STRUCTURE FOR A MULTI-LAYERED DIELECTRIC LAYER AND MANUFACTURING METHOD THEREOF' [patent_app_type] => new [patent_app_number] => 09/178464 [patent_app_country] => US [patent_app_date] => 1998-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5386 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20010034122.pdf [firstpage_image] =>[orig_patent_app_number] => 09178464 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/178464
Structure for a multi-layered dielectric layer and manufacturing method thereof Oct 22, 1998 Issued
Array ( [id] => 4249513 [patent_doc_number] => 06207488 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-27 [patent_title] => 'Method for forming a tantalum oxide capacitor using two-step rapid thermal nitridation' [patent_app_type] => 1 [patent_app_number] => 9/177841 [patent_app_country] => US [patent_app_date] => 1998-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2719 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/207/06207488.pdf [firstpage_image] =>[orig_patent_app_number] => 177841 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/177841
Method for forming a tantalum oxide capacitor using two-step rapid thermal nitridation Oct 21, 1998 Issued
Array ( [id] => 4139190 [patent_doc_number] => 06060356 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-09 [patent_title] => 'Method of fabricating virtual ground SSI flash EPROM cell and array' [patent_app_type] => 1 [patent_app_number] => 9/175154 [patent_app_country] => US [patent_app_date] => 1998-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 3217 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/060/06060356.pdf [firstpage_image] =>[orig_patent_app_number] => 175154 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/175154
Method of fabricating virtual ground SSI flash EPROM cell and array Oct 18, 1998 Issued
Array ( [id] => 4214320 [patent_doc_number] => 06110773 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-29 [patent_title] => 'Static random access memory device manufacturing method' [patent_app_type] => 1 [patent_app_number] => 9/172441 [patent_app_country] => US [patent_app_date] => 1998-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3813 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/110/06110773.pdf [firstpage_image] =>[orig_patent_app_number] => 172441 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/172441
Static random access memory device manufacturing method Oct 13, 1998 Issued
Array ( [id] => 4350281 [patent_doc_number] => 06291294 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-18 [patent_title] => 'Method for making a stack bottom storage node having reduced crystallization of amorphous polysilicon' [patent_app_type] => 1 [patent_app_number] => 9/170861 [patent_app_country] => US [patent_app_date] => 1998-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 1679 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/291/06291294.pdf [firstpage_image] =>[orig_patent_app_number] => 170861 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/170861
Method for making a stack bottom storage node having reduced crystallization of amorphous polysilicon Oct 12, 1998 Issued
Array ( [id] => 4185556 [patent_doc_number] => 06093601 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-25 [patent_title] => 'Method of fabricating crown capacitor by using oxynitride mask' [patent_app_type] => 1 [patent_app_number] => 9/167491 [patent_app_country] => US [patent_app_date] => 1998-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2211 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/093/06093601.pdf [firstpage_image] =>[orig_patent_app_number] => 167491 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/167491
Method of fabricating crown capacitor by using oxynitride mask Oct 6, 1998 Issued
Array ( [id] => 4243848 [patent_doc_number] => 06166410 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'MONOS flash memory for multi-level logic and method thereof' [patent_app_type] => 1 [patent_app_number] => 9/166390 [patent_app_country] => US [patent_app_date] => 1998-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 5846 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 301 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/166/06166410.pdf [firstpage_image] =>[orig_patent_app_number] => 166390 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/166390
MONOS flash memory for multi-level logic and method thereof Oct 4, 1998 Issued
Array ( [id] => 4405344 [patent_doc_number] => 06271134 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Apparatus for manufacturing semiconductor device method for forming HSG-polysilicon layer using same and method for forming capacitor having electrode of HSG-polysilicon layer' [patent_app_type] => 1 [patent_app_number] => 9/166223 [patent_app_country] => US [patent_app_date] => 1998-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5910 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/271/06271134.pdf [firstpage_image] =>[orig_patent_app_number] => 166223 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/166223
Apparatus for manufacturing semiconductor device method for forming HSG-polysilicon layer using same and method for forming capacitor having electrode of HSG-polysilicon layer Oct 4, 1998 Issued
Array ( [id] => 4116617 [patent_doc_number] => 06071773 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-06 [patent_title] => 'Process for fabricating a DRAM metal capacitor structure for use in an integrated circuit' [patent_app_type] => 1 [patent_app_number] => 9/166393 [patent_app_country] => US [patent_app_date] => 1998-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 3936 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 448 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/071/06071773.pdf [firstpage_image] =>[orig_patent_app_number] => 166393 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/166393
Process for fabricating a DRAM metal capacitor structure for use in an integrated circuit Oct 4, 1998 Issued
Array ( [id] => 4238000 [patent_doc_number] => 06080621 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-27 [patent_title] => 'Method of manufacturing dynamic random access memory' [patent_app_type] => 1 [patent_app_number] => 9/165253 [patent_app_country] => US [patent_app_date] => 1998-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3586 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 333 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/080/06080621.pdf [firstpage_image] =>[orig_patent_app_number] => 165253 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/165253
Method of manufacturing dynamic random access memory Sep 30, 1998 Issued
Array ( [id] => 1372310 [patent_doc_number] => 06562733 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-05-13 [patent_title] => 'Semiconductor device manufacturing method' [patent_app_type] => B2 [patent_app_number] => 09/163170 [patent_app_country] => US [patent_app_date] => 1998-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 3708 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/562/06562733.pdf [firstpage_image] =>[orig_patent_app_number] => 09163170 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/163170
Semiconductor device manufacturing method Sep 29, 1998 Issued
Array ( [id] => 4235517 [patent_doc_number] => 06143614 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'Monolithic inductor' [patent_app_type] => 1 [patent_app_number] => 9/163062 [patent_app_country] => US [patent_app_date] => 1998-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 1325 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/143/06143614.pdf [firstpage_image] =>[orig_patent_app_number] => 163062 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/163062
Monolithic inductor Sep 28, 1998 Issued
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