Search

Brook Kebede

Examiner (ID: 4420)

Most Active Art Unit
2894
Art Unit(s)
2823, 2894, 2818
Total Applications
2152
Issued Applications
1882
Pending Applications
114
Abandoned Applications
188

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17048014 [patent_doc_number] => 11101204 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-24 [patent_title] => Semiconductor module [patent_app_type] => utility [patent_app_number] => 16/333996 [patent_app_country] => US [patent_app_date] => 2018-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7514 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 340 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16333996 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/333996
Semiconductor module Jun 7, 2018 Issued
Array ( [id] => 14707025 [patent_doc_number] => 10381271 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-13 [patent_title] => Field effect transistor with stacked nanowire-like channels and methods of manufacturing the same [patent_app_type] => utility [patent_app_number] => 15/997596 [patent_app_country] => US [patent_app_date] => 2018-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 29 [patent_no_of_words] => 15236 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15997596 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/997596
Field effect transistor with stacked nanowire-like channels and methods of manufacturing the same Jun 3, 2018 Issued
Array ( [id] => 17166254 [patent_doc_number] => 11152366 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-19 [patent_title] => Semiconductor device and method for driving semiconductor device [patent_app_type] => utility [patent_app_number] => 16/619190 [patent_app_country] => US [patent_app_date] => 2018-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 62 [patent_no_of_words] => 35506 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16619190 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/619190
Semiconductor device and method for driving semiconductor device May 28, 2018 Issued
Array ( [id] => 17166254 [patent_doc_number] => 11152366 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-19 [patent_title] => Semiconductor device and method for driving semiconductor device [patent_app_type] => utility [patent_app_number] => 16/619190 [patent_app_country] => US [patent_app_date] => 2018-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 62 [patent_no_of_words] => 35506 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16619190 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/619190
Semiconductor device and method for driving semiconductor device May 28, 2018 Issued
Array ( [id] => 14333221 [patent_doc_number] => 10297639 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-21 [patent_title] => Electronic device and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 15/979339 [patent_app_country] => US [patent_app_date] => 2018-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 39 [patent_no_of_words] => 13512 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15979339 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/979339
Electronic device and method for fabricating the same May 13, 2018 Issued
Array ( [id] => 13558981 [patent_doc_number] => 20180331038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-15 [patent_title] => 3D Chip Sharing Data Bus [patent_app_type] => utility [patent_app_number] => 15/976823 [patent_app_country] => US [patent_app_date] => 2018-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15943 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15976823 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/976823
3D chip sharing data bus May 9, 2018 Issued
Array ( [id] => 15673077 [patent_doc_number] => 10600780 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-24 [patent_title] => 3D chip sharing data bus circuit [patent_app_type] => utility [patent_app_number] => 15/976827 [patent_app_country] => US [patent_app_date] => 2018-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 31 [patent_no_of_words] => 15944 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15976827 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/976827
3D chip sharing data bus circuit May 9, 2018 Issued
Array ( [id] => 13559049 [patent_doc_number] => 20180331072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-15 [patent_title] => Face-to-Face Mounted IC Dies with Orthogonal Top Interconnect Layers [patent_app_type] => utility [patent_app_number] => 15/976811 [patent_app_country] => US [patent_app_date] => 2018-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15943 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15976811 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/976811
Face-to-face mounted IC dies with orthogonal top interconnect layers May 9, 2018 Issued
Array ( [id] => 13559095 [patent_doc_number] => 20180331095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-15 [patent_title] => 3D Chip with Shielded Clock Lines [patent_app_type] => utility [patent_app_number] => 15/976828 [patent_app_country] => US [patent_app_date] => 2018-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15943 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15976828 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/976828
3D chip with shielded clock lines May 9, 2018 Issued
Array ( [id] => 13558889 [patent_doc_number] => 20180330992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-15 [patent_title] => 3D Chip Sharing Power Interconnect Layer [patent_app_type] => utility [patent_app_number] => 15/976815 [patent_app_country] => US [patent_app_date] => 2018-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15943 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15976815 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/976815
3D chip sharing power interconnect layer May 9, 2018 Issued
Array ( [id] => 15580683 [patent_doc_number] => 10580735 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-03 [patent_title] => Stacked IC structure with system level wiring on multiple sides of the IC die [patent_app_type] => utility [patent_app_number] => 15/976809 [patent_app_country] => US [patent_app_date] => 2018-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 31 [patent_no_of_words] => 15950 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15976809 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/976809
Stacked IC structure with system level wiring on multiple sides of the IC die May 9, 2018 Issued
Array ( [id] => 15984655 [patent_doc_number] => 10672663 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-02 [patent_title] => 3D chip sharing power circuit [patent_app_type] => utility [patent_app_number] => 15/976817 [patent_app_country] => US [patent_app_date] => 2018-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 31 [patent_no_of_words] => 15944 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15976817 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/976817
3D chip sharing power circuit May 9, 2018 Issued
Array ( [id] => 15611433 [patent_doc_number] => 10586786 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-10 [patent_title] => 3D chip sharing clock interconnect layer [patent_app_type] => utility [patent_app_number] => 15/976821 [patent_app_country] => US [patent_app_date] => 2018-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 31 [patent_no_of_words] => 15943 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15976821 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/976821
3D chip sharing clock interconnect layer May 9, 2018 Issued
Array ( [id] => 13786163 [patent_doc_number] => 20190006620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-03 [patent_title] => APPARATUS, METHOD OF MANUFACTURING DISPLAY APPARATUS, AND PROTECTIVE FILM [patent_app_type] => utility [patent_app_number] => 15/976256 [patent_app_country] => US [patent_app_date] => 2018-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13959 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15976256 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/976256
Apparatus, method of manufacturing display apparatus, and protective film May 9, 2018 Issued
Array ( [id] => 15250585 [patent_doc_number] => 10510822 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-17 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 15/976680 [patent_app_country] => US [patent_app_date] => 2018-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 20092 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15976680 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/976680
Display device May 9, 2018 Issued
Array ( [id] => 14367057 [patent_doc_number] => 10304841 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-28 [patent_title] => Metal FinFET anti-fuse [patent_app_type] => utility [patent_app_number] => 15/968235 [patent_app_country] => US [patent_app_date] => 2018-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8064 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15968235 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/968235
Metal FinFET anti-fuse Apr 30, 2018 Issued
Array ( [id] => 14333073 [patent_doc_number] => 10297565 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-21 [patent_title] => Electronic device by laser-induced forming and transfer of shaped metallic interconnects [patent_app_type] => utility [patent_app_number] => 15/962736 [patent_app_country] => US [patent_app_date] => 2018-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2705 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15962736 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/962736
Electronic device by laser-induced forming and transfer of shaped metallic interconnects Apr 24, 2018 Issued
Array ( [id] => 15049097 [patent_doc_number] => 20190335553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => MICRO LIGHT-EMITTING DIODE DISPLAY DRIVER ARCHITECTURE AND PIXEL STRUCTURE [patent_app_type] => utility [patent_app_number] => 15/962965 [patent_app_country] => US [patent_app_date] => 2018-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10322 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15962965 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/962965
Micro light-emitting diode display driver architecture and pixel structure Apr 24, 2018 Issued
Array ( [id] => 13393073 [patent_doc_number] => 20180248079 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-30 [patent_title] => SOLID STATE LIGHTING DEVICES WITH ACCESSIBLE ELECTRODES AND METHODS OF MANUFACTURING [patent_app_type] => utility [patent_app_number] => 15/961473 [patent_app_country] => US [patent_app_date] => 2018-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3926 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15961473 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/961473
Solid state lighting devices with accessible electrodes and methods of manufacturing Apr 23, 2018 Issued
Array ( [id] => 16440375 [patent_doc_number] => 20200357702 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-12 [patent_title] => MANUFACTURING METHOD OF COMPLEMENTARY METAL OXIDE SEMICONDUCTOR TRANSISTOR AND MANUFACTURING METHOD OF ARRAY SUBSTRATE [patent_app_type] => utility [patent_app_number] => 16/096871 [patent_app_country] => US [patent_app_date] => 2018-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3251 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16096871 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/096871
Manufacturing method of complementary metal oxide semiconductor transistor and manufacturing method of array substrate Apr 19, 2018 Issued
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