Search

Brook Kebede

Examiner (ID: 2450, Phone: (571)272-1862 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2894, 2818, 2823
Total Applications
2158
Issued Applications
1886
Pending Applications
118
Abandoned Applications
190

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19104847 [patent_doc_number] => 11957922 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-16 [patent_title] => Structurally embedded and inhospitable environment systems having autonomous electrical power sources [patent_app_type] => utility [patent_app_number] => 18/106473 [patent_app_country] => US [patent_app_date] => 2023-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 14637 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 340 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18106473 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/106473
Structurally embedded and inhospitable environment systems having autonomous electrical power sources Feb 5, 2023 Issued
Array ( [id] => 18706473 [patent_doc_number] => 11793005 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-17 [patent_title] => 3D semiconductor devices and structures [patent_app_type] => utility [patent_app_number] => 18/105041 [patent_app_country] => US [patent_app_date] => 2023-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 81 [patent_figures_cnt] => 105 [patent_no_of_words] => 15662 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18105041 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/105041
3D semiconductor devices and structures Feb 1, 2023 Issued
Array ( [id] => 18424048 [patent_doc_number] => 20230178512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => METHOD OF MANUFACTURING A BONDED SUBSTRATE STACK BY SURFACE ACTIVATION [patent_app_type] => utility [patent_app_number] => 18/104456 [patent_app_country] => US [patent_app_date] => 2023-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5511 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18104456 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/104456
Method of manufacturing a bonded substrate stack by surface activation Jan 31, 2023 Issued
Array ( [id] => 18859152 [patent_doc_number] => 11856762 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Memory devices and methods of manufacturing thereof [patent_app_type] => utility [patent_app_number] => 18/157418 [patent_app_country] => US [patent_app_date] => 2023-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 44 [patent_no_of_words] => 12216 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18157418 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/157418
Memory devices and methods of manufacturing thereof Jan 19, 2023 Issued
Array ( [id] => 18533309 [patent_doc_number] => 20230238385 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-27 [patent_title] => SILICON-ON-INSULATOR SUBSTRATE PROCESSING FOR TRANSISTOR ENHANCEMENT [patent_app_type] => utility [patent_app_number] => 18/156661 [patent_app_country] => US [patent_app_date] => 2023-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10291 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18156661 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/156661
SILICON-ON-INSULATOR SUBSTRATE PROCESSING FOR TRANSISTOR ENHANCEMENT Jan 18, 2023 Pending
Array ( [id] => 18361299 [patent_doc_number] => 20230142890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => Method of Manufacturing Semiconductor Device, Cleaning Method, and Non-transitory Computer-readable Recording Medium [patent_app_type] => utility [patent_app_number] => 18/093046 [patent_app_country] => US [patent_app_date] => 2023-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12785 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18093046 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/093046
Method of manufacturing semiconductor device, cleaning method, and non-transitory computer-readable recording medium Jan 3, 2023 Issued
Array ( [id] => 18782267 [patent_doc_number] => 11824033 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Semiconductor package and method of manufacturing the semiconductor package [patent_app_type] => utility [patent_app_number] => 18/149342 [patent_app_country] => US [patent_app_date] => 2023-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 31 [patent_no_of_words] => 10790 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18149342 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/149342
Semiconductor package and method of manufacturing the semiconductor package Jan 2, 2023 Issued
Array ( [id] => 18408891 [patent_doc_number] => 20230170244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-01 [patent_title] => 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH BONDING [patent_app_type] => utility [patent_app_number] => 18/092337 [patent_app_country] => US [patent_app_date] => 2023-01-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 79917 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18092337 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/092337
3D semiconductor device and structure with bonding Dec 31, 2022 Issued
Array ( [id] => 18394807 [patent_doc_number] => 20230163028 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-25 [patent_title] => METAL-ON-METAL DEPOSITION METHODS FOR FILLING A GAP FEATURE ON A SUBSTRATE SURFACE [patent_app_type] => utility [patent_app_number] => 18/148687 [patent_app_country] => US [patent_app_date] => 2022-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8141 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18148687 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/148687
METAL-ON-METAL DEPOSITION METHODS FOR FILLING A GAP FEATURE ON A SUBSTRATE SURFACE Dec 29, 2022 Pending
Array ( [id] => 18394807 [patent_doc_number] => 20230163028 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-25 [patent_title] => METAL-ON-METAL DEPOSITION METHODS FOR FILLING A GAP FEATURE ON A SUBSTRATE SURFACE [patent_app_type] => utility [patent_app_number] => 18/148687 [patent_app_country] => US [patent_app_date] => 2022-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8141 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18148687 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/148687
METAL-ON-METAL DEPOSITION METHODS FOR FILLING A GAP FEATURE ON A SUBSTRATE SURFACE Dec 29, 2022 Pending
Array ( [id] => 19178122 [patent_doc_number] => 20240164096 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD, MEMORY AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/090592 [patent_app_country] => US [patent_app_date] => 2022-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10011 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18090592 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/090592
Semiconductor device and its manufacturing method, memory and memory system Dec 28, 2022 Issued
Array ( [id] => 18488415 [patent_doc_number] => 20230215763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => SYSTEMS AND METHODS FOR CLEANING AND TREATING A SURFACE OF A SUBSTRATE [patent_app_type] => utility [patent_app_number] => 18/147038 [patent_app_country] => US [patent_app_date] => 2022-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5265 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18147038 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/147038
SYSTEMS AND METHODS FOR CLEANING AND TREATING A SURFACE OF A SUBSTRATE Dec 27, 2022 Pending
Array ( [id] => 19118380 [patent_doc_number] => 20240130130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICE, MANUFACTURING METHOD THEREOF, AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/090374 [patent_app_country] => US [patent_app_date] => 2022-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 28347 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18090374 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/090374
Three-dimensional memory device, manufacturing method thereof, and memory system Dec 27, 2022 Issued
Array ( [id] => 18349469 [patent_doc_number] => 20230137580 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-04 [patent_title] => 3D CHIP WITH SHARED CLOCK DISTRIBUTION NETWORK [patent_app_type] => utility [patent_app_number] => 18/146709 [patent_app_country] => US [patent_app_date] => 2022-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16135 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18146709 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/146709
3D chip with shared clock distribution network Dec 26, 2022 Issued
Array ( [id] => 19046622 [patent_doc_number] => 11935742 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Method of processing substrate, method of manufacturing semiconductor device, substrate processing apparatus, and recording medium [patent_app_type] => utility [patent_app_number] => 18/081277 [patent_app_country] => US [patent_app_date] => 2022-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 18181 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18081277 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/081277
Method of processing substrate, method of manufacturing semiconductor device, substrate processing apparatus, and recording medium Dec 13, 2022 Issued
Array ( [id] => 18307106 [patent_doc_number] => 20230111006 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => PACKAGE STRUCTURE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/079854 [patent_app_country] => US [patent_app_date] => 2022-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6341 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18079854 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/079854
Package structure and method of fabricating the same Dec 11, 2022 Issued
Array ( [id] => 18440094 [patent_doc_number] => 20230187389 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => METHOD OF MANUFACTURING A REDISTRIBUTION LAYER, REDISTRIBUTION LAYER, INTEGRATED CIRCUIT AND METHODS FOR ELECTRICALLY TESTING AND PROTECTING THE INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/078561 [patent_app_country] => US [patent_app_date] => 2022-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6071 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -31 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18078561 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/078561
METHOD OF MANUFACTURING A REDISTRIBUTION LAYER, REDISTRIBUTION LAYER, INTEGRATED CIRCUIT AND METHODS FOR ELECTRICALLY TESTING AND PROTECTING THE INTEGRATED CIRCUIT Dec 8, 2022 Pending
Array ( [id] => 19958431 [patent_doc_number] => 12328862 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-10 [patent_title] => Semiconductor structure and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 18/073478 [patent_app_country] => US [patent_app_date] => 2022-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18073478 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/073478
Semiconductor structure and manufacturing method thereof Nov 30, 2022 Issued
Array ( [id] => 19958431 [patent_doc_number] => 12328862 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-10 [patent_title] => Semiconductor structure and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 18/073478 [patent_app_country] => US [patent_app_date] => 2022-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18073478 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/073478
Semiconductor structure and manufacturing method thereof Nov 30, 2022 Issued
Array ( [id] => 18408857 [patent_doc_number] => 20230170210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-01 [patent_title] => Methods and Precursors for Selective Deposition of Metal Films [patent_app_type] => utility [patent_app_number] => 17/994932 [patent_app_country] => US [patent_app_date] => 2022-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5008 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17994932 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/994932
Methods and precursors for selective deposition of metal films Nov 27, 2022 Issued
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