Search

Bruce I. Ebersman

Examiner (ID: 8966, Phone: (571)270-3442 , Office: P/3692 )

Most Active Art Unit
3692
Art Unit(s)
3693, 3691, 3692, 3698
Total Applications
759
Issued Applications
442
Pending Applications
78
Abandoned Applications
255

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19546680 [patent_doc_number] => 20240363716 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => THIN FILM TRANSISTOR INCLUDING A COMPOSITIONALLY-GRADED GATE DIELECTRIC AND METHODS FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/770929 [patent_app_country] => US [patent_app_date] => 2024-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14655 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18770929 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/770929
THIN FILM TRANSISTOR INCLUDING A COMPOSITIONALLY-GRADED GATE DIELECTRIC AND METHODS FOR FORMING THE SAME Jul 11, 2024 Pending
Array ( [id] => 20705656 [patent_doc_number] => 12628382 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-12 [patent_title] => Interfacial dual passivation layer for a ferroelectric device and methods of forming the same [patent_app_type] => utility [patent_app_number] => 18/757386 [patent_app_country] => US [patent_app_date] => 2024-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 32 [patent_no_of_words] => 5749 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18757386 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/757386
Interfacial dual passivation layer for a ferroelectric device and methods of forming the same Jun 26, 2024 Issued
Array ( [id] => 19486666 [patent_doc_number] => 20240334708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICE WITH FERROELECTRIC MATERIAL [patent_app_type] => utility [patent_app_number] => 18/742325 [patent_app_country] => US [patent_app_date] => 2024-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7896 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18742325 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/742325
THREE-DIMENSIONAL MEMORY DEVICE WITH FERROELECTRIC MATERIAL Jun 12, 2024 Pending
Array ( [id] => 19468257 [patent_doc_number] => 20240321927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => IMAGING DEVICE, MANUFACTURING METHOD, AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/680445 [patent_app_country] => US [patent_app_date] => 2024-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 28425 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18680445 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/680445
IMAGING DEVICE, MANUFACTURING METHOD, AND ELECTRONIC DEVICE May 30, 2024 Pending
Array ( [id] => 20776505 [patent_doc_number] => 12660197 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-16 [patent_title] => Ferroelectric memory device and method of forming the same [patent_app_type] => utility [patent_app_number] => 18/677952 [patent_app_country] => US [patent_app_date] => 2024-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 54 [patent_figures_cnt] => 57 [patent_no_of_words] => 6437 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18677952 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/677952
Ferroelectric memory device and method of forming the same May 29, 2024 Issued
Array ( [id] => 19468376 [patent_doc_number] => 20240322046 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME [patent_app_type] => utility [patent_app_number] => 18/675249 [patent_app_country] => US [patent_app_date] => 2024-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 61244 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18675249 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/675249
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME May 27, 2024 Pending
Array ( [id] => 19619193 [patent_doc_number] => 20240404873 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => INTEGRATED CIRCUIT CHIP COMPRISING A RADIOFREQUENCY COMPONENT [patent_app_type] => utility [patent_app_number] => 18/671424 [patent_app_country] => US [patent_app_date] => 2024-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4145 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18671424 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/671424
INTEGRATED CIRCUIT CHIP COMPRISING A RADIOFREQUENCY COMPONENT May 21, 2024 Pending
Array ( [id] => 19407625 [patent_doc_number] => 20240291136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => Three-dimensional Heterogeneous Integrated Millimeter-wave System Package Structure [patent_app_type] => utility [patent_app_number] => 18/658201 [patent_app_country] => US [patent_app_date] => 2024-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5402 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18658201 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/658201
Three-dimensional Heterogeneous Integrated Millimeter-wave System Package Structure May 7, 2024 Abandoned
Array ( [id] => 19407360 [patent_doc_number] => 20240290871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => Forming 3D Transistors Using 2D Van Der WAALS Materials [patent_app_type] => utility [patent_app_number] => 18/657927 [patent_app_country] => US [patent_app_date] => 2024-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6418 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18657927 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/657927
Forming 3D transistors using 2D van der WAALS materials May 7, 2024 Issued
Array ( [id] => 20339092 [patent_doc_number] => 20250343212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-06 [patent_title] => SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/652774 [patent_app_country] => US [patent_app_date] => 2024-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18652774 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/652774
SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF Apr 30, 2024 Pending
Array ( [id] => 20065742 [patent_doc_number] => 20250203964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => Dielectric Frame Structures to Mitigate Lay-Out-Dependent Effect in Semiconductor Devices [patent_app_type] => utility [patent_app_number] => 18/649262 [patent_app_country] => US [patent_app_date] => 2024-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6097 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18649262 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/649262
Dielectric Frame Structures to Mitigate Lay-Out-Dependent Effect in Semiconductor Devices Apr 28, 2024 Pending
Array ( [id] => 20065642 [patent_doc_number] => 20250203864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING ELECTRODE AND ISOLATION PATTERN AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/647687 [patent_app_country] => US [patent_app_date] => 2024-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2301 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18647687 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/647687
SEMICONDUCTOR DEVICE INCLUDING ELECTRODE AND ISOLATION PATTERN AND METHOD OF FORMING THE SAME Apr 25, 2024 Pending
Array ( [id] => 20792878 [patent_doc_number] => 12666811 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-23 [patent_title] => Display device, display panel and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 18/641532 [patent_app_country] => US [patent_app_date] => 2024-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 17737 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18641532 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/641532
DISPLAY DEVICE, DISPLAY PANEL AND MANUFACTURING METHOD THEREOF Apr 21, 2024 Issued
Array ( [id] => 20582876 [patent_doc_number] => 12575137 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-10 [patent_title] => Thin film transistor including a compositionally-modulated active region and methods for forming the same [patent_app_type] => utility [patent_app_number] => 18/630585 [patent_app_country] => US [patent_app_date] => 2024-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 115 [patent_no_of_words] => 14687 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18630585 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/630585
Thin film transistor including a compositionally-modulated active region and methods for forming the same Apr 8, 2024 Issued
Array ( [id] => 19288044 [patent_doc_number] => 20240224527 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => MEMORY DEVICE BASED ON IGO CHANNEL LAYER AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/609871 [patent_app_country] => US [patent_app_date] => 2024-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4187 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18609871 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/609871
MEMORY DEVICE BASED ON IGO CHANNEL LAYER AND METHOD OF FABRICATING THE SAME Mar 18, 2024 Pending
Array ( [id] => 19286024 [patent_doc_number] => 20240222502 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => VERTICAL TRANSISTOR AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/607547 [patent_app_country] => US [patent_app_date] => 2024-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12008 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18607547 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/607547
VERTICAL TRANSISTOR AND METHOD FOR FABRICATING THE SAME Mar 17, 2024 Pending
Array ( [id] => 19269662 [patent_doc_number] => 20240213367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => TWO-DIMENSIONAL (2D) MATERIAL FOR OXIDE SEMICONDUCTOR (OS) FERROELECTRIC FIELD-EFFECT TRANSISTOR (FEFET) DEVICE [patent_app_type] => utility [patent_app_number] => 18/597981 [patent_app_country] => US [patent_app_date] => 2024-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9820 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18597981 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/597981
TWO-DIMENSIONAL (2D) MATERIAL FOR OXIDE SEMICONDUCTOR (OS) FERROELECTRIC FIELD-EFFECT TRANSISTOR (FEFET) DEVICE Mar 6, 2024 Pending
Array ( [id] => 19349452 [patent_doc_number] => 20240258416 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/597074 [patent_app_country] => US [patent_app_date] => 2024-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7694 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18597074 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/597074
TRANSISTOR Mar 5, 2024 Pending
Array ( [id] => 20224735 [patent_doc_number] => 20250287666 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-11 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD [patent_app_type] => utility [patent_app_number] => 18/597219 [patent_app_country] => US [patent_app_date] => 2024-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5368 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18597219 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/597219
SEMICONDUCTOR DEVICE AND METHOD Mar 5, 2024 Pending
Array ( [id] => 20224809 [patent_doc_number] => 20250287740 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-11 [patent_title] => ANCHORED ENCAPSULATION IN LED DEVICES [patent_app_type] => utility [patent_app_number] => 18/597406 [patent_app_country] => US [patent_app_date] => 2024-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1328 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18597406 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/597406
ANCHORED ENCAPSULATION IN LED DEVICES Mar 5, 2024 Pending
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