Bryan Bui
Examiner (ID: 11867, Phone: (571)272-2271 , Office: P/2865 )
Most Active Art Unit | 2863 |
Art Unit(s) | 2414, 2863, 2764, 2857, 2865 |
Total Applications | 2284 |
Issued Applications | 2045 |
Pending Applications | 88 |
Abandoned Applications | 151 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 9958491
[patent_doc_number] => 09006700
[patent_country] => US
[patent_kind] => B2
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[patent_title] => 'Resistive memory with a stabilizer'
[patent_app_type] => utility
[patent_app_number] => 13/924734
[patent_app_country] => US
[patent_app_date] => 2013-06-24
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/924734 | Resistive memory with a stabilizer | Jun 23, 2013 | Issued |
Array
(
[id] => 9205452
[patent_doc_number] => 20140004629
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[patent_kind] => A1
[patent_issue_date] => 2014-01-02
[patent_title] => 'METHOD FOR PROCESSING SILICON WAFER'
[patent_app_type] => utility
[patent_app_number] => 13/925364
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/925364 | Method for processing silicon wafer | Jun 23, 2013 | Issued |
Array
(
[id] => 9205465
[patent_doc_number] => 20140004642
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[patent_issue_date] => 2014-01-02
[patent_title] => 'MANUFACTURING METHOD FOR ORGANIC ELECTROLUMINESCENCE DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/924992
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[patent_app_date] => 2013-06-24
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Array
(
[id] => 9205523
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[patent_issue_date] => 2014-01-02
[patent_title] => 'MANUFACTURING METHOD FOR A SEMICONDUCTOR APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 13/925510
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Array
(
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[patent_doc_number] => 20140374891
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[patent_issue_date] => 2014-12-25
[patent_title] => 'SEMICONDUCTOR DEVICE WITH HEAT SPREADER AND THERMAL SHEET'
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Array
(
[id] => 9888933
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[patent_title] => 'Stress-controlled formation of tin hard mask'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/925495 | Stress-controlled formation of tin hard mask | Jun 23, 2013 | Issued |
Array
(
[id] => 9455684
[patent_doc_number] => 08716695
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[patent_issue_date] => 2014-05-06
[patent_title] => 'Compressive (PFET) and tensile (NFET) channel strain in nanowire FETs fabricated with a replacement gate process'
[patent_app_type] => utility
[patent_app_number] => 13/923530
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[patent_app_date] => 2013-06-21
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/923530 | Compressive (PFET) and tensile (NFET) channel strain in nanowire FETs fabricated with a replacement gate process | Jun 20, 2013 | Issued |
Array
(
[id] => 10971732
[patent_doc_number] => 20140374766
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[patent_kind] => A1
[patent_issue_date] => 2014-12-25
[patent_title] => 'BI-DIRECTIONAL GALLIUM NITRIDE SWITCH WITH SELF-MANAGED SUBSTRATE BIAS'
[patent_app_type] => utility
[patent_app_number] => 13/922352
[patent_app_country] => US
[patent_app_date] => 2013-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/922352 | BI-DIRECTIONAL GALLIUM NITRIDE SWITCH WITH SELF-MANAGED SUBSTRATE BIAS | Jun 19, 2013 | Abandoned |
Array
(
[id] => 10971651
[patent_doc_number] => 20140374686
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-12-25
[patent_title] => 'THERMAL-DISTURB MITIGATION IN DUAL-DECK CROSS-POINT MEMORIES'
[patent_app_type] => utility
[patent_app_number] => 13/921672
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[patent_app_date] => 2013-06-19
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/921672 | Thermal-disturb mitigation in dual-deck cross-point memories | Jun 18, 2013 | Issued |
Array
(
[id] => 11681333
[patent_doc_number] => 09679868
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-06-13
[patent_title] => 'Ball height control in bonding process'
[patent_app_type] => utility
[patent_app_number] => 13/922081
[patent_app_country] => US
[patent_app_date] => 2013-06-19
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/922081 | Ball height control in bonding process | Jun 18, 2013 | Issued |
Array
(
[id] => 10971887
[patent_doc_number] => 20140374922
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-12-25
[patent_title] => 'Alignment in the Packaging of Integrated Circuits'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/922130 | Alignment in the packaging of integrated circuits | Jun 18, 2013 | Issued |
Array
(
[id] => 10570287
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[patent_issue_date] => 2016-03-22
[patent_title] => 'Embedded SRAM and methods of forming the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/922097 | Embedded SRAM and methods of forming the same | Jun 18, 2013 | Issued |
Array
(
[id] => 9561335
[patent_doc_number] => 20140179048
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[patent_kind] => A1
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[patent_title] => 'METHOD FOR PREPARING ABSORBING LAYER OF SOLAR CELL AND THERMAL TREATMENT DEVICE THEREOF'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/908256 | METHOD FOR PREPARING ABSORBING LAYER OF SOLAR CELL AND THERMAL TREATMENT DEVICE THEREOF | Jun 2, 2013 | Abandoned |
Array
(
[id] => 11180833
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/391015 | Manufacturing method for silicon carbide semiconductor device | May 15, 2013 | Issued |
Array
(
[id] => 9449534
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/890476 | Method for crystallizing a silicon substrate | May 8, 2013 | Issued |
Array
(
[id] => 9850154
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/868497 | Method of fabricating optoelectronic integrated circuit substrate | Apr 22, 2013 | Issued |
Array
(
[id] => 9895561
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[patent_title] => 'LIGHT EMITTING DIODES AND A METHOD OF PACKAGING THE SAME'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/394501 | Light emitting diodes and a method of packaging the same | Apr 18, 2013 | Issued |
Array
(
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[patent_title] => 'WAFER LEVEL BONDING METHOD FOR FABRICATING WAFER LEVEL CAMERA LENSES'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/865814 | Wafer level bonding method for fabricating wafer level camera lenses | Apr 17, 2013 | Issued |
Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/394115 | Method for manufacturing silicon carbide semiconductor device | Apr 9, 2013 | Issued |