Search

Bryan J. Jaketic

Examiner (ID: 12300)

Most Active Art Unit
3652
Art Unit(s)
3652, 3617, 2167, 3627
Total Applications
255
Issued Applications
202
Pending Applications
28
Abandoned Applications
25

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3736032 [patent_doc_number] => 05673419 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-30 [patent_title] => 'Parity bit emulator with write parity bit checking' [patent_app_type] => 1 [patent_app_number] => 8/444963 [patent_app_country] => US [patent_app_date] => 1995-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10863 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/673/05673419.pdf [firstpage_image] =>[orig_patent_app_number] => 444963 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/444963
Parity bit emulator with write parity bit checking May 18, 1995 Issued
Array ( [id] => 3711895 [patent_doc_number] => 05646844 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-08 [patent_title] => 'Method and apparatus for real-time monitoring and coordination of multiple geography altering machines on a work site' [patent_app_type] => 1 [patent_app_number] => 8/439539 [patent_app_country] => US [patent_app_date] => 1995-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 13437 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/646/05646844.pdf [firstpage_image] =>[orig_patent_app_number] => 439539 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/439539
Method and apparatus for real-time monitoring and coordination of multiple geography altering machines on a work site May 10, 1995 Issued
Array ( [id] => 3704636 [patent_doc_number] => 05619420 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-08 [patent_title] => 'Semiconductor cell having a variable transistor width' [patent_app_type] => 1 [patent_app_number] => 8/434660 [patent_app_country] => US [patent_app_date] => 1995-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5256 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/619/05619420.pdf [firstpage_image] =>[orig_patent_app_number] => 434660 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/434660
Semiconductor cell having a variable transistor width May 3, 1995 Issued
Array ( [id] => 3803282 [patent_doc_number] => 05737580 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-07 [patent_title] => 'Wiring design tool improvement for avoiding electromigration by determining optimal wire widths' [patent_app_type] => 1 [patent_app_number] => 8/430670 [patent_app_country] => US [patent_app_date] => 1995-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 3794 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/737/05737580.pdf [firstpage_image] =>[orig_patent_app_number] => 430670 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/430670
Wiring design tool improvement for avoiding electromigration by determining optimal wire widths Apr 27, 1995 Issued
Array ( [id] => 4231696 [patent_doc_number] => 06011563 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-04 [patent_title] => 'Computer controlled photoirradiation during photodynamic therapy' [patent_app_type] => 1 [patent_app_number] => 8/427668 [patent_app_country] => US [patent_app_date] => 1995-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 8467 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/011/06011563.pdf [firstpage_image] =>[orig_patent_app_number] => 427668 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/427668
Computer controlled photoirradiation during photodynamic therapy Apr 23, 1995 Issued
Array ( [id] => 3951864 [patent_doc_number] => 05872952 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-16 [patent_title] => 'Integrated circuit power net analysis through simulation' [patent_app_type] => 1 [patent_app_number] => 8/424876 [patent_app_country] => US [patent_app_date] => 1995-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 8521 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/872/05872952.pdf [firstpage_image] =>[orig_patent_app_number] => 424876 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/424876
Integrated circuit power net analysis through simulation Apr 16, 1995 Issued
Array ( [id] => 3738599 [patent_doc_number] => 05652870 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-29 [patent_title] => 'Microcomputer having multiplexable input-output port' [patent_app_type] => 1 [patent_app_number] => 8/420168 [patent_app_country] => US [patent_app_date] => 1995-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 5337 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/652/05652870.pdf [firstpage_image] =>[orig_patent_app_number] => 420168 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/420168
Microcomputer having multiplexable input-output port Apr 10, 1995 Issued
08/419076 INDEPENDENT CONTROL OF DMA AND I/O RESOURCES FOR MIXED-ENDIAN COMPUTING SYSTEMS Apr 6, 1995 Abandoned
Array ( [id] => 3660498 [patent_doc_number] => 05640541 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-17 [patent_title] => 'Adapter for interfacing a SCSI bus with an IBM system/360/370 I/O interface channel and information system including same' [patent_app_type] => 1 [patent_app_number] => 8/410086 [patent_app_country] => US [patent_app_date] => 1995-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 54 [patent_figures_cnt] => 56 [patent_no_of_words] => 15367 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/640/05640541.pdf [firstpage_image] =>[orig_patent_app_number] => 410086 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/410086
Adapter for interfacing a SCSI bus with an IBM system/360/370 I/O interface channel and information system including same Mar 23, 1995 Issued
Array ( [id] => 3703390 [patent_doc_number] => 05661663 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-26 [patent_title] => 'Physical design automation system and method using hierarchical clusterization and placement improvement based on complete re-placement of cell clusters' [patent_app_type] => 1 [patent_app_number] => 8/409757 [patent_app_country] => US [patent_app_date] => 1995-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 23 [patent_no_of_words] => 5927 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/661/05661663.pdf [firstpage_image] =>[orig_patent_app_number] => 409757 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/409757
Physical design automation system and method using hierarchical clusterization and placement improvement based on complete re-placement of cell clusters Mar 23, 1995 Issued
Array ( [id] => 3716603 [patent_doc_number] => 05675772 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-07 [patent_title] => 'Device and method for reconfiguring a computer system with an incompatible CPU' [patent_app_type] => 1 [patent_app_number] => 8/409280 [patent_app_country] => US [patent_app_date] => 1995-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 7014 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/675/05675772.pdf [firstpage_image] =>[orig_patent_app_number] => 409280 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/409280
Device and method for reconfiguring a computer system with an incompatible CPU Mar 22, 1995 Issued
Array ( [id] => 3657354 [patent_doc_number] => 05638289 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-10 [patent_title] => 'Method and apparatus allowing hot replacement of circuit boards' [patent_app_type] => 1 [patent_app_number] => 8/405863 [patent_app_country] => US [patent_app_date] => 1995-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 6335 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/638/05638289.pdf [firstpage_image] =>[orig_patent_app_number] => 405863 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/405863
Method and apparatus allowing hot replacement of circuit boards Mar 16, 1995 Issued
Array ( [id] => 3712348 [patent_doc_number] => 05675501 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-07 [patent_title] => 'Method of designing semiconductor integrated circuit apparatus having no dead space' [patent_app_type] => 1 [patent_app_number] => 8/404452 [patent_app_country] => US [patent_app_date] => 1995-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 26 [patent_no_of_words] => 5365 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/675/05675501.pdf [firstpage_image] =>[orig_patent_app_number] => 404452 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/404452
Method of designing semiconductor integrated circuit apparatus having no dead space Mar 14, 1995 Issued
Array ( [id] => 3701072 [patent_doc_number] => 05644755 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-01 [patent_title] => 'Processor with virtual system mode' [patent_app_type] => 1 [patent_app_number] => 8/394680 [patent_app_country] => US [patent_app_date] => 1995-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 11523 [patent_no_of_claims] => 86 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/644/05644755.pdf [firstpage_image] =>[orig_patent_app_number] => 394680 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/394680
Processor with virtual system mode Feb 23, 1995 Issued
Array ( [id] => 3643621 [patent_doc_number] => 05631841 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-20 [patent_title] => 'Circuit connection information generation through circuit analysis and component replacement' [patent_app_type] => 1 [patent_app_number] => 8/392352 [patent_app_country] => US [patent_app_date] => 1995-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 28 [patent_no_of_words] => 12111 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/631/05631841.pdf [firstpage_image] =>[orig_patent_app_number] => 392352 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/392352
Circuit connection information generation through circuit analysis and component replacement Feb 21, 1995 Issued
08/379060 OPTIMIZING CHAIN PLACEMENT IN A PROGRAMMABLE LOGIC DEVICE Jan 26, 1995 Abandoned
08/375455 SYSTEM AND METHOD FOR GENERATING EFFECTIVE LAYOUT CONSTRAINTS FOR A CIRCUIT DESIGN OR THE LIKE Jan 18, 1995 Abandoned
Array ( [id] => 3751705 [patent_doc_number] => 05787011 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-28 [patent_title] => 'Low-power design techniques for high-performance CMOS circuits' [patent_app_type] => 1 [patent_app_number] => 8/375145 [patent_app_country] => US [patent_app_date] => 1995-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 30 [patent_no_of_words] => 6597 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/787/05787011.pdf [firstpage_image] =>[orig_patent_app_number] => 375145 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/375145
Low-power design techniques for high-performance CMOS circuits Jan 18, 1995 Issued
Array ( [id] => 3853145 [patent_doc_number] => 05745371 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-28 [patent_title] => 'System and method for mounting components and layout for printed boards' [patent_app_type] => 1 [patent_app_number] => 8/370855 [patent_app_country] => US [patent_app_date] => 1995-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 8713 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/745/05745371.pdf [firstpage_image] =>[orig_patent_app_number] => 370855 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/370855
System and method for mounting components and layout for printed boards Jan 9, 1995 Issued
Array ( [id] => 3633532 [patent_doc_number] => 05615357 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-25 [patent_title] => 'System and method for verifying processor performance' [patent_app_type] => 1 [patent_app_number] => 8/365799 [patent_app_country] => US [patent_app_date] => 1994-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 8799 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/615/05615357.pdf [firstpage_image] =>[orig_patent_app_number] => 365799 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/365799
System and method for verifying processor performance Dec 28, 1994 Issued
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