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Bryan Van Huynh

Examiner (ID: 6680)

Most Active Art Unit
2841
Art Unit(s)
2841
Total Applications
4
Issued Applications
4
Pending Applications
0
Abandoned Applications
0

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10035534 [patent_doc_number] => 09076860 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-07-07 [patent_title] => 'Residue removal from singulated die sidewall' [patent_app_type] => utility [patent_app_number] => 14/248165 [patent_app_country] => US [patent_app_date] => 2014-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 10879 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14248165 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/248165
Residue removal from singulated die sidewall Apr 7, 2014 Issued
Array ( [id] => 10402629 [patent_doc_number] => 20150287638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-08 [patent_title] => 'HYBRID WAFER DICING APPROACH USING COLLIMATED LASER SCRIBING PROCESS AND PLASMA ETCH' [patent_app_type] => utility [patent_app_number] => 14/248205 [patent_app_country] => US [patent_app_date] => 2014-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8517 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14248205 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/248205
HYBRID WAFER DICING APPROACH USING COLLIMATED LASER SCRIBING PROCESS AND PLASMA ETCH Apr 7, 2014 Abandoned
Array ( [id] => 9753872 [patent_doc_number] => 20140284572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-25 [patent_title] => 'ORGANIC ELECTROLUMINESCENCE DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/207765 [patent_app_country] => US [patent_app_date] => 2014-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2495 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14207765 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/207765
Organic electroluminescence display device Mar 12, 2014 Issued
Array ( [id] => 9938029 [patent_doc_number] => 08987841 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-24 [patent_title] => 'Backside stimulated sensor with background current manipulation' [patent_app_type] => utility [patent_app_number] => 14/205203 [patent_app_country] => US [patent_app_date] => 2014-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 26 [patent_no_of_words] => 9908 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14205203 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/205203
Backside stimulated sensor with background current manipulation Mar 10, 2014 Issued
Array ( [id] => 9565973 [patent_doc_number] => 20140183686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'AUTONOMOUS INTEGRATED CIRCUITS' [patent_app_type] => utility [patent_app_number] => 14/199206 [patent_app_country] => US [patent_app_date] => 2014-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3490 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14199206 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/199206
Autonomous integrated circuits Mar 5, 2014 Issued
Array ( [id] => 9537785 [patent_doc_number] => 20140162432 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-12 [patent_title] => 'Semiconductor Structure and Method' [patent_app_type] => utility [patent_app_number] => 14/179103 [patent_app_country] => US [patent_app_date] => 2014-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2801 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14179103 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/179103
Semiconductor structure and method Feb 11, 2014 Issued
Array ( [id] => 10066921 [patent_doc_number] => 09105782 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-11 [patent_title] => 'Arrays of ultrathin silicon solar microcells' [patent_app_type] => utility [patent_app_number] => 14/173525 [patent_app_country] => US [patent_app_date] => 2014-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 27587 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14173525 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/173525
Arrays of ultrathin silicon solar microcells Feb 4, 2014 Issued
Array ( [id] => 9594696 [patent_doc_number] => 20140191373 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-10 [patent_title] => 'Composite Wafer and Method for Manufacturing the Same' [patent_app_type] => utility [patent_app_number] => 14/164915 [patent_app_country] => US [patent_app_date] => 2014-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5603 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14164915 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/164915
Composite wafer and method for manufacturing the same Jan 26, 2014 Issued
Array ( [id] => 10882353 [patent_doc_number] => 08906732 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-09 [patent_title] => 'Method and device for cadmium-free solar cells' [patent_app_type] => utility [patent_app_number] => 14/155143 [patent_app_country] => US [patent_app_date] => 2014-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6905 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14155143 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/155143
Method and device for cadmium-free solar cells Jan 13, 2014 Issued
Array ( [id] => 10652376 [patent_doc_number] => 09368644 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-14 [patent_title] => 'Gate formation memory by planarization' [patent_app_type] => utility [patent_app_number] => 14/136358 [patent_app_country] => US [patent_app_date] => 2013-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5924 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14136358 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/136358
Gate formation memory by planarization Dec 19, 2013 Issued
Array ( [id] => 10277410 [patent_doc_number] => 20150162407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-11 [patent_title] => 'Semiconductor Device with Recombination Region' [patent_app_type] => utility [patent_app_number] => 14/102955 [patent_app_country] => US [patent_app_date] => 2013-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7856 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14102955 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/102955
Semiconductor device with recombination region Dec 10, 2013 Issued
Array ( [id] => 10277404 [patent_doc_number] => 20150162401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-11 [patent_title] => 'DUAL TRENCH STRUCTURE' [patent_app_type] => utility [patent_app_number] => 14/098183 [patent_app_country] => US [patent_app_date] => 2013-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5473 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14098183 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/098183
Dual trench structure Dec 4, 2013 Issued
Array ( [id] => 10244993 [patent_doc_number] => 20150129988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-14 [patent_title] => 'REDUCED RESISTANCE FINFET DEVICE WITH LATE SPACER SELF ALIGNED CONTACT' [patent_app_type] => utility [patent_app_number] => 14/075033 [patent_app_country] => US [patent_app_date] => 2013-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4670 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14075033 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/075033
Reduced resistance finFET device with late spacer self aligned contact Nov 7, 2013 Issued
Array ( [id] => 10402649 [patent_doc_number] => 20150287658 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-08 [patent_title] => 'HIGH-FREQUENCY INTEGRATED DEVICE WITH AN ENHANCED INDUCTANCE AND A PROCESS THEREOF' [patent_app_type] => utility [patent_app_number] => 14/441329 [patent_app_country] => US [patent_app_date] => 2013-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9412 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14441329 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/441329
High-frequency integrated device with an enhanced inductance and a process thereof Oct 29, 2013 Issued
Array ( [id] => 12102332 [patent_doc_number] => 09859434 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-02 [patent_title] => 'Semiconductor devices and methods for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 14/914246 [patent_app_country] => US [patent_app_date] => 2013-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 7666 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14914246 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/914246
Semiconductor devices and methods for manufacturing the same Oct 28, 2013 Issued
Array ( [id] => 9370404 [patent_doc_number] => 20140080277 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-20 [patent_title] => 'COMPOUND SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/061185 [patent_app_country] => US [patent_app_date] => 2013-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3304 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14061185 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/061185
COMPOUND SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Oct 22, 2013 Abandoned
Array ( [id] => 10223486 [patent_doc_number] => 20150108479 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-23 [patent_title] => 'THIN-FILM TRANSISTORS INCORPORATED INTO THREE DIMENSIONAL MEMS STRUCTURES' [patent_app_type] => utility [patent_app_number] => 14/061415 [patent_app_country] => US [patent_app_date] => 2013-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 17040 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14061415 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/061415
Thin-film transistors incorporated into three dimensional MEMS structures Oct 22, 2013 Issued
Array ( [id] => 9303918 [patent_doc_number] => 20140042592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-13 [patent_title] => 'Bipolar transistor' [patent_app_type] => utility [patent_app_number] => 13/998242 [patent_app_country] => US [patent_app_date] => 2013-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4546 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13998242 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/998242
Bipolar transistor Oct 14, 2013 Issued
Array ( [id] => 14036195 [patent_doc_number] => 10229853 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-12 [patent_title] => Non-planar I/O and logic semiconductor devices having different workfunction on common substrate [patent_app_type] => utility [patent_app_number] => 14/914179 [patent_app_country] => US [patent_app_date] => 2013-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 7489 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14914179 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/914179
Non-planar I/O and logic semiconductor devices having different workfunction on common substrate Sep 26, 2013 Issued
Array ( [id] => 9996492 [patent_doc_number] => 09041094 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-26 [patent_title] => 'Finfet formed over dielectric' [patent_app_type] => utility [patent_app_number] => 14/035313 [patent_app_country] => US [patent_app_date] => 2013-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 4104 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14035313 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/035313
Finfet formed over dielectric Sep 23, 2013 Issued
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