Search

Bryce P. Bonzo

Supervisory Patent Examiner (ID: 17164, Phone: (571)272-3655 , Office: P/2113 )

Most Active Art Unit
2113
Art Unit(s)
2785, 2113, 2114, 2184
Total Applications
941
Issued Applications
813
Pending Applications
34
Abandoned Applications
97

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10464080 [patent_doc_number] => 20150349095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-03 [patent_title] => 'METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH NONVOLATILE MEMORY DEVICES' [patent_app_type] => utility [patent_app_number] => 14/294984 [patent_app_country] => US [patent_app_date] => 2014-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4132 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14294984 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/294984
METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH NONVOLATILE MEMORY DEVICES Jun 2, 2014 Abandoned
Array ( [id] => 10378005 [patent_doc_number] => 20150263012 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/294303 [patent_app_country] => US [patent_app_date] => 2014-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5398 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14294303 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/294303
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF Jun 2, 2014 Abandoned
Array ( [id] => 10252290 [patent_doc_number] => 20150137286 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-21 [patent_title] => 'METHOD TO FORM MRAM BY DUAL ION IMPLANTATION' [patent_app_type] => utility [patent_app_number] => 14/289648 [patent_app_country] => US [patent_app_date] => 2014-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1806 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14289648 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/289648
METHOD TO FORM MRAM BY DUAL ION IMPLANTATION May 28, 2014 Abandoned
Array ( [id] => 10681667 [patent_doc_number] => 20160027812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-28 [patent_title] => 'ARRAY SUBSTRATE, METHOD FOR FABRICATING THE SAME AND DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/429501 [patent_app_country] => US [patent_app_date] => 2014-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5677 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14429501 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/429501
Array substrate, method for fabricating the same and display device May 28, 2014 Issued
Array ( [id] => 10455425 [patent_doc_number] => 20150340440 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-26 [patent_title] => 'BIPOLAR TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 14/284148 [patent_app_country] => US [patent_app_date] => 2014-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5864 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14284148 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/284148
Bipolar transistor May 20, 2014 Issued
Array ( [id] => 10321971 [patent_doc_number] => 20150206976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-23 [patent_title] => 'THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/283063 [patent_app_country] => US [patent_app_date] => 2014-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 5021 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14283063 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/283063
THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME May 19, 2014 Abandoned
Array ( [id] => 11891154 [patent_doc_number] => 09761721 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-12 [patent_title] => 'Field effect transistors with self-aligned extension portions of epitaxial active regions' [patent_app_type] => utility [patent_app_number] => 14/282069 [patent_app_country] => US [patent_app_date] => 2014-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 29 [patent_no_of_words] => 6340 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14282069 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/282069
Field effect transistors with self-aligned extension portions of epitaxial active regions May 19, 2014 Issued
Array ( [id] => 10302918 [patent_doc_number] => 20150187918 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-02 [patent_title] => 'POWER SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/281365 [patent_app_country] => US [patent_app_date] => 2014-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4063 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14281365 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/281365
POWER SEMICONDUCTOR DEVICE May 18, 2014 Abandoned
Array ( [id] => 10681666 [patent_doc_number] => 20160027811 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-28 [patent_title] => 'THIN FILM TRANSISTOR, ARRAY SUBSTRATE AND DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/430138 [patent_app_country] => US [patent_app_date] => 2014-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5469 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14430138 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/430138
THIN FILM TRANSISTOR, ARRAY SUBSTRATE AND DISPLAY DEVICE May 11, 2014 Abandoned
Array ( [id] => 10302678 [patent_doc_number] => 20150187678 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-02 [patent_title] => 'POWER SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/270894 [patent_app_country] => US [patent_app_date] => 2014-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4310 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14270894 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/270894
POWER SEMICONDUCTOR DEVICE May 5, 2014 Abandoned
Array ( [id] => 10426187 [patent_doc_number] => 20150311199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-29 [patent_title] => 'MULTIPLE FIN FINFET WITH LOW-RESISTANCE GATE STRUCTURE' [patent_app_type] => utility [patent_app_number] => 14/264240 [patent_app_country] => US [patent_app_date] => 2014-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2513 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14264240 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/264240
Multiple fin finFET with low-resistance gate structure Apr 28, 2014 Issued
Array ( [id] => 10426132 [patent_doc_number] => 20150311143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-29 [patent_title] => 'LEAD FRAMES HAVING METAL TRACES WITH METAL STUBS' [patent_app_type] => utility [patent_app_number] => 14/264071 [patent_app_country] => US [patent_app_date] => 2014-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3712 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14264071 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/264071
LEAD FRAMES HAVING METAL TRACES WITH METAL STUBS Apr 28, 2014 Abandoned
Array ( [id] => 10321848 [patent_doc_number] => 20150206852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-23 [patent_title] => 'COPPER CLAD LAMINATE HAVING BARRIER STRUCTURE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/262199 [patent_app_country] => US [patent_app_date] => 2014-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1915 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14262199 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/262199
COPPER CLAD LAMINATE HAVING BARRIER STRUCTURE AND METHOD OF MANUFACTURING THE SAME Apr 24, 2014 Abandoned
Array ( [id] => 10418295 [patent_doc_number] => 20150303305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-22 [patent_title] => 'FinFET Device with High-K Metal Gate Stack' [patent_app_type] => utility [patent_app_number] => 14/254035 [patent_app_country] => US [patent_app_date] => 2014-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6130 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14254035 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/254035
FinFET device with high-k metal gate stack Apr 15, 2014 Issued
Array ( [id] => 14859191 [patent_doc_number] => 10418330 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-17 [patent_title] => Semiconductor devices and methods of making semiconductor devices [patent_app_type] => utility [patent_app_number] => 14/253504 [patent_app_country] => US [patent_app_date] => 2014-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7455 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 348 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14253504 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/253504
Semiconductor devices and methods of making semiconductor devices Apr 14, 2014 Issued
Array ( [id] => 10394808 [patent_doc_number] => 20150279815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'Semiconductor Device and Method of Forming Substrate Having Conductive Columns' [patent_app_type] => utility [patent_app_number] => 14/228769 [patent_app_country] => US [patent_app_date] => 2014-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 12553 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14228769 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/228769
Semiconductor Device and Method of Forming Substrate Having Conductive Columns Mar 27, 2014
Array ( [id] => 10394817 [patent_doc_number] => 20150279824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'ELECTRONIC PACKAGE AND METHOD OF FORMING AN ELECTRONIC PACKAGE' [patent_app_type] => utility [patent_app_number] => 14/228685 [patent_app_country] => US [patent_app_date] => 2014-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4661 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14228685 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/228685
ELECTRONIC PACKAGE AND METHOD OF FORMING AN ELECTRONIC PACKAGE Mar 27, 2014
Array ( [id] => 15703833 [patent_doc_number] => 10608104 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-31 [patent_title] => Trench transistor device [patent_app_type] => utility [patent_app_number] => 14/228881 [patent_app_country] => US [patent_app_date] => 2014-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 5464 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14228881 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/228881
Trench transistor device Mar 27, 2014 Issued
Array ( [id] => 10495277 [patent_doc_number] => 20150380299 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-31 [patent_title] => 'METHODS FOR PROVIDING SPACED LITHOGRAPHY FEATURES ON A SUBSTRATE BY SELF-ASSEMBLY OF BLOCK COPOLYMERS' [patent_app_type] => utility [patent_app_number] => 14/768423 [patent_app_country] => US [patent_app_date] => 2014-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6568 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14768423 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/768423
METHODS FOR PROVIDING SPACED LITHOGRAPHY FEATURES ON A SUBSTRATE BY SELF-ASSEMBLY OF BLOCK COPOLYMERS Feb 25, 2014 Abandoned
Array ( [id] => 10448112 [patent_doc_number] => 20150333127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-19 [patent_title] => 'SILICON CARBIDE SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/652483 [patent_app_country] => US [patent_app_date] => 2013-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6664 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14652483 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/652483
Silicon carbide semiconductor device Dec 18, 2013 Issued
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