
Bryce P. Bonzo
Supervisory Patent Examiner (ID: 19547, Phone: (571)272-3655 , Office: P/2113 )
| Most Active Art Unit | 2113 |
| Art Unit(s) | 2114, 2785, 2184, 2113 |
| Total Applications | 943 |
| Issued Applications | 814 |
| Pending Applications | 35 |
| Abandoned Applications | 97 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 908622
[patent_doc_number] => 07337350
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-02-26
[patent_title] => 'Clustered storage system with external storage systems'
[patent_app_type] => utility
[patent_app_number] => 11/055001
[patent_app_country] => US
[patent_app_date] => 2005-02-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 7048
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 203
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/337/07337350.pdf
[firstpage_image] =>[orig_patent_app_number] => 11055001
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/055001 | Clustered storage system with external storage systems | Feb 8, 2005 | Issued |
Array
(
[id] => 213379
[patent_doc_number] => 07624298
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-11-24
[patent_title] => 'Memory card, data processor, memory card control method and memory card setting'
[patent_app_type] => utility
[patent_app_number] => 10/597650
[patent_app_country] => US
[patent_app_date] => 2005-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 6870
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/624/07624298.pdf
[firstpage_image] =>[orig_patent_app_number] => 10597650
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/597650 | Memory card, data processor, memory card control method and memory card setting | Feb 1, 2005 | Issued |
Array
(
[id] => 381163
[patent_doc_number] => 07310743
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2007-12-18
[patent_title] => 'Data recovery method and apparatus'
[patent_app_type] => utility
[patent_app_number] => 11/047138
[patent_app_country] => US
[patent_app_date] => 2005-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6526
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 214
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/310/07310743.pdf
[firstpage_image] =>[orig_patent_app_number] => 11047138
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/047138 | Data recovery method and apparatus | Jan 30, 2005 | Issued |
Array
(
[id] => 623385
[patent_doc_number] => 07143308
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-11-28
[patent_title] => 'Apparatus, system, and method for differential rebuilding of a reactivated offline RAID member disk'
[patent_app_type] => utility
[patent_app_number] => 11/035860
[patent_app_country] => US
[patent_app_date] => 2005-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 20
[patent_no_of_words] => 11828
[patent_no_of_claims] => 37
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/143/07143308.pdf
[firstpage_image] =>[orig_patent_app_number] => 11035860
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/035860 | Apparatus, system, and method for differential rebuilding of a reactivated offline RAID member disk | Jan 13, 2005 | Issued |
Array
(
[id] => 600079
[patent_doc_number] => 07441158
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-10-21
[patent_title] => 'Embedded hardware debugging tool and associated method'
[patent_app_type] => utility
[patent_app_number] => 11/032517
[patent_app_country] => US
[patent_app_date] => 2005-01-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3398
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 220
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/441/07441158.pdf
[firstpage_image] =>[orig_patent_app_number] => 11032517
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/032517 | Embedded hardware debugging tool and associated method | Jan 9, 2005 | Issued |
Array
(
[id] => 5695930
[patent_doc_number] => 20060156077
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-13
[patent_title] => 'System and method for updating end user error reports using programmer defect logs'
[patent_app_type] => utility
[patent_app_number] => 11/032185
[patent_app_country] => US
[patent_app_date] => 2005-01-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7009
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0156/20060156077.pdf
[firstpage_image] =>[orig_patent_app_number] => 11032185
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/032185 | System and method for updating end user error reports using programmer defect logs | Jan 9, 2005 | Issued |
Array
(
[id] => 5633557
[patent_doc_number] => 20060150028
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-06
[patent_title] => 'System and method for monitoring application availability'
[patent_app_type] => utility
[patent_app_number] => 11/030249
[patent_app_country] => US
[patent_app_date] => 2005-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6361
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0150/20060150028.pdf
[firstpage_image] =>[orig_patent_app_number] => 11030249
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/030249 | System and method for monitoring application availability | Jan 5, 2005 | Issued |
Array
(
[id] => 5633559
[patent_doc_number] => 20060150030
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-06
[patent_title] => 'Management of memory controller reset'
[patent_app_type] => utility
[patent_app_number] => 11/030477
[patent_app_country] => US
[patent_app_date] => 2005-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1107
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0150/20060150030.pdf
[firstpage_image] =>[orig_patent_app_number] => 11030477
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/030477 | Management of memory controller reset | Jan 5, 2005 | Issued |
Array
(
[id] => 922602
[patent_doc_number] => 07321989
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-01-22
[patent_title] => 'Simultaneously multithreaded processing and single event failure detection method'
[patent_app_type] => utility
[patent_app_number] => 11/029706
[patent_app_country] => US
[patent_app_date] => 2005-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 3525
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/321/07321989.pdf
[firstpage_image] =>[orig_patent_app_number] => 11029706
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/029706 | Simultaneously multithreaded processing and single event failure detection method | Jan 4, 2005 | Issued |
Array
(
[id] => 852196
[patent_doc_number] => 07383472
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-06-03
[patent_title] => 'Disk array subsystem'
[patent_app_type] => utility
[patent_app_number] => 11/028243
[patent_app_country] => US
[patent_app_date] => 2005-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 17494
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 423
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/383/07383472.pdf
[firstpage_image] =>[orig_patent_app_number] => 11028243
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/028243 | Disk array subsystem | Jan 3, 2005 | Issued |
Array
(
[id] => 839966
[patent_doc_number] => 07395454
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-07-01
[patent_title] => 'Integrated circuit with integrated debugging mechanism for standard interface'
[patent_app_type] => utility
[patent_app_number] => 11/028687
[patent_app_country] => US
[patent_app_date] => 2005-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2424
[patent_no_of_claims] => 44
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/395/07395454.pdf
[firstpage_image] =>[orig_patent_app_number] => 11028687
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/028687 | Integrated circuit with integrated debugging mechanism for standard interface | Jan 3, 2005 | Issued |
Array
(
[id] => 5633544
[patent_doc_number] => 20060150015
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-06
[patent_title] => 'Error monitoring of partitions in a computer system using partition status indicators'
[patent_app_type] => utility
[patent_app_number] => 11/029778
[patent_app_country] => US
[patent_app_date] => 2005-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4852
[patent_no_of_claims] => 45
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0150/20060150015.pdf
[firstpage_image] =>[orig_patent_app_number] => 11029778
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/029778 | Error monitoring of partitions in a computer system using partition status indicators | Jan 3, 2005 | Issued |
Array
(
[id] => 922167
[patent_doc_number] => 07325163
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-01-29
[patent_title] => 'Error monitoring of partitions in a computer system using supervisor partitions'
[patent_app_type] => utility
[patent_app_number] => 11/029780
[patent_app_country] => US
[patent_app_date] => 2005-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 13
[patent_no_of_words] => 4544
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 283
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/325/07325163.pdf
[firstpage_image] =>[orig_patent_app_number] => 11029780
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/029780 | Error monitoring of partitions in a computer system using supervisor partitions | Jan 3, 2005 | Issued |
Array
(
[id] => 596765
[patent_doc_number] => 07454659
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-11-18
[patent_title] => 'Distributed systems in test environments'
[patent_app_type] => utility
[patent_app_number] => 11/028171
[patent_app_country] => US
[patent_app_date] => 2004-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 26
[patent_no_of_words] => 25556
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/454/07454659.pdf
[firstpage_image] =>[orig_patent_app_number] => 11028171
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/028171 | Distributed systems in test environments | Dec 29, 2004 | Issued |
Array
(
[id] => 6927573
[patent_doc_number] => 20050240830
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-27
[patent_title] => 'Multiprocessor system, processor device'
[patent_app_type] => utility
[patent_app_number] => 10/998152
[patent_app_country] => US
[patent_app_date] => 2004-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5931
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0240/20050240830.pdf
[firstpage_image] =>[orig_patent_app_number] => 10998152
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/998152 | Multiprocessor system, processor device | Nov 28, 2004 | Abandoned |
Array
(
[id] => 6907184
[patent_doc_number] => 20050102579
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-12
[patent_title] => 'Microcomputer, electronic equipment, and debugging system'
[patent_app_type] => utility
[patent_app_number] => 10/985901
[patent_app_country] => US
[patent_app_date] => 2004-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 8148
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0102/20050102579.pdf
[firstpage_image] =>[orig_patent_app_number] => 10985901
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/985901 | Microcomputer, electronic equipment, and debugging system | Nov 11, 2004 | Issued |
Array
(
[id] => 731580
[patent_doc_number] => 07047443
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-05-16
[patent_title] => 'Microcomputer, electronic equipment and debugging system'
[patent_app_type] => utility
[patent_app_number] => 10/981770
[patent_app_country] => US
[patent_app_date] => 2004-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 47
[patent_no_of_words] => 10164
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 229
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/047/07047443.pdf
[firstpage_image] =>[orig_patent_app_number] => 10981770
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/981770 | Microcomputer, electronic equipment and debugging system | Nov 4, 2004 | Issued |
Array
(
[id] => 96974
[patent_doc_number] => 07734952
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2010-06-08
[patent_title] => 'System and method for maintaining a constant processor service level in a computer'
[patent_app_type] => utility
[patent_app_number] => 10/974194
[patent_app_country] => US
[patent_app_date] => 2004-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4969
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/734/07734952.pdf
[firstpage_image] =>[orig_patent_app_number] => 10974194
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/974194 | System and method for maintaining a constant processor service level in a computer | Oct 26, 2004 | Issued |
Array
(
[id] => 823494
[patent_doc_number] => 07409598
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-08-05
[patent_title] => 'Information storage system'
[patent_app_type] => utility
[patent_app_number] => 10/540159
[patent_app_country] => US
[patent_app_date] => 2004-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 13
[patent_no_of_words] => 5552
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/409/07409598.pdf
[firstpage_image] =>[orig_patent_app_number] => 10540159
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/540159 | Information storage system | Oct 26, 2004 | Issued |
Array
(
[id] => 7013666
[patent_doc_number] => 20050066220
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-24
[patent_title] => 'Method and apparatus for network fault correction via adaptive fault router'
[patent_app_type] => utility
[patent_app_number] => 10/963098
[patent_app_country] => US
[patent_app_date] => 2004-10-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 7497
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 18
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0066/20050066220.pdf
[firstpage_image] =>[orig_patent_app_number] => 10963098
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/963098 | Method and apparatus for network fault correction via adaptive fault router | Oct 11, 2004 | Issued |