
Bryce P. Bonzo
Supervisory Patent Examiner (ID: 19547, Phone: (571)272-3655 , Office: P/2113 )
| Most Active Art Unit | 2113 |
| Art Unit(s) | 2114, 2785, 2184, 2113 |
| Total Applications | 943 |
| Issued Applications | 814 |
| Pending Applications | 35 |
| Abandoned Applications | 97 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7084999
[patent_doc_number] => 20050050379
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-03
[patent_title] => 'Method and apparatus for network fault correction via adaptive fault router'
[patent_app_type] => utility
[patent_app_number] => 10/962846
[patent_app_country] => US
[patent_app_date] => 2004-10-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 7497
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0050/20050050379.pdf
[firstpage_image] =>[orig_patent_app_number] => 10962846
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/962846 | Method and apparatus for network fault correction via adaptive fault router | Oct 11, 2004 | Issued |
Array
(
[id] => 208610
[patent_doc_number] => 07631225
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-12-08
[patent_title] => 'Approach for characterizing the dynamic availability behavior of network elements'
[patent_app_type] => utility
[patent_app_number] => 10/956286
[patent_app_country] => US
[patent_app_date] => 2004-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 5957
[patent_no_of_claims] => 52
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/631/07631225.pdf
[firstpage_image] =>[orig_patent_app_number] => 10956286
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/956286 | Approach for characterizing the dynamic availability behavior of network elements | Sep 30, 2004 | Issued |
Array
(
[id] => 900213
[patent_doc_number] => 07343515
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-03-11
[patent_title] => 'System and method for performing error recovery in a data processing system having multiple processing partitions'
[patent_app_type] => utility
[patent_app_number] => 10/954842
[patent_app_country] => US
[patent_app_date] => 2004-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 14
[patent_no_of_words] => 24793
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/343/07343515.pdf
[firstpage_image] =>[orig_patent_app_number] => 10954842
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/954842 | System and method for performing error recovery in a data processing system having multiple processing partitions | Sep 29, 2004 | Issued |
Array
(
[id] => 852191
[patent_doc_number] => 07383470
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-06-03
[patent_title] => 'Method, system, and apparatus for identifying unresponsive portions of a computer program'
[patent_app_type] => utility
[patent_app_number] => 10/955365
[patent_app_country] => US
[patent_app_date] => 2004-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5185
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/383/07383470.pdf
[firstpage_image] =>[orig_patent_app_number] => 10955365
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/955365 | Method, system, and apparatus for identifying unresponsive portions of a computer program | Sep 29, 2004 | Issued |
Array
(
[id] => 832642
[patent_doc_number] => 07401258
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-07-15
[patent_title] => 'Circuit for and method of accessing instruction data written to a memory'
[patent_app_type] => utility
[patent_app_number] => 10/956599
[patent_app_country] => US
[patent_app_date] => 2004-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 14
[patent_no_of_words] => 5159
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/401/07401258.pdf
[firstpage_image] =>[orig_patent_app_number] => 10956599
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/956599 | Circuit for and method of accessing instruction data written to a memory | Sep 29, 2004 | Issued |
Array
(
[id] => 7223241
[patent_doc_number] => 20050055610
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-10
[patent_title] => 'Storage device, data processing system and data writing and readout method'
[patent_app_type] => utility
[patent_app_number] => 10/955167
[patent_app_country] => US
[patent_app_date] => 2004-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8113
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0055/20050055610.pdf
[firstpage_image] =>[orig_patent_app_number] => 10955167
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/955167 | Storage device, data processing system and data writing and readout method | Sep 28, 2004 | Issued |
Array
(
[id] => 329577
[patent_doc_number] => 07516351
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-04-07
[patent_title] => 'Distributed testing apparatus and host testing apparatus'
[patent_app_type] => utility
[patent_app_number] => 10/901965
[patent_app_country] => US
[patent_app_date] => 2004-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 12876
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/516/07516351.pdf
[firstpage_image] =>[orig_patent_app_number] => 10901965
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/901965 | Distributed testing apparatus and host testing apparatus | Jul 29, 2004 | Issued |
Array
(
[id] => 929647
[patent_doc_number] => 07315960
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-01-01
[patent_title] => 'Storage area network system'
[patent_app_type] => utility
[patent_app_number] => 10/901046
[patent_app_country] => US
[patent_app_date] => 2004-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 20
[patent_no_of_words] => 6347
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 212
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/315/07315960.pdf
[firstpage_image] =>[orig_patent_app_number] => 10901046
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/901046 | Storage area network system | Jul 28, 2004 | Issued |
Array
(
[id] => 396838
[patent_doc_number] => 07299385
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-11-20
[patent_title] => 'Managing a fault tolerant system'
[patent_app_type] => utility
[patent_app_number] => 10/900948
[patent_app_country] => US
[patent_app_date] => 2004-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 5917
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/299/07299385.pdf
[firstpage_image] =>[orig_patent_app_number] => 10900948
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/900948 | Managing a fault tolerant system | Jul 27, 2004 | Issued |
Array
(
[id] => 894796
[patent_doc_number] => 07350116
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-03-25
[patent_title] => 'Clock synchronization and fault protection for a telecommunications device'
[patent_app_type] => utility
[patent_app_number] => 10/901835
[patent_app_country] => US
[patent_app_date] => 2004-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 10185
[patent_no_of_claims] => 49
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/350/07350116.pdf
[firstpage_image] =>[orig_patent_app_number] => 10901835
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/901835 | Clock synchronization and fault protection for a telecommunications device | Jul 27, 2004 | Issued |
Array
(
[id] => 472957
[patent_doc_number] => 07234078
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-06-19
[patent_title] => 'Data recovery method and data recording apparatus'
[patent_app_type] => utility
[patent_app_number] => 10/900314
[patent_app_country] => US
[patent_app_date] => 2004-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4757
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/234/07234078.pdf
[firstpage_image] =>[orig_patent_app_number] => 10900314
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/900314 | Data recovery method and data recording apparatus | Jul 27, 2004 | Issued |
Array
(
[id] => 451274
[patent_doc_number] => 07254742
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-08-07
[patent_title] => 'Disk array device and battery output control method for disk array device'
[patent_app_type] => utility
[patent_app_number] => 10/899062
[patent_app_country] => US
[patent_app_date] => 2004-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 15406
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/254/07254742.pdf
[firstpage_image] =>[orig_patent_app_number] => 10899062
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/899062 | Disk array device and battery output control method for disk array device | Jul 26, 2004 | Issued |
Array
(
[id] => 5821649
[patent_doc_number] => 20060025962
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-02-02
[patent_title] => 'Method and system for troubleshooting a misconfiguration of a computer system based on product support services information'
[patent_app_type] => utility
[patent_app_number] => 10/899939
[patent_app_country] => US
[patent_app_date] => 2004-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4589
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0025/20060025962.pdf
[firstpage_image] =>[orig_patent_app_number] => 10899939
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/899939 | Method and system for troubleshooting a misconfiguration of a computer system based on product support services information | Jul 26, 2004 | Issued |
Array
(
[id] => 404265
[patent_doc_number] => 07293191
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2007-11-06
[patent_title] => 'System and method for managing I/O errors in a storage environment employing asymmetric distributed block virtualization'
[patent_app_type] => utility
[patent_app_number] => 10/899195
[patent_app_country] => US
[patent_app_date] => 2004-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 18
[patent_no_of_words] => 11229
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/293/07293191.pdf
[firstpage_image] =>[orig_patent_app_number] => 10899195
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/899195 | System and method for managing I/O errors in a storage environment employing asymmetric distributed block virtualization | Jul 25, 2004 | Issued |
Array
(
[id] => 5770863
[patent_doc_number] => 20060020856
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-01-26
[patent_title] => 'Computer diagnostic interface'
[patent_app_type] => utility
[patent_app_number] => 10/895960
[patent_app_country] => US
[patent_app_date] => 2004-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4034
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0020/20060020856.pdf
[firstpage_image] =>[orig_patent_app_number] => 10895960
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/895960 | Computer diagnostic interface | Jul 21, 2004 | Abandoned |
Array
(
[id] => 272337
[patent_doc_number] => 07565577
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-07-21
[patent_title] => 'Method and apparatus for providing intelligent error messaging'
[patent_app_type] => utility
[patent_app_number] => 10/895991
[patent_app_country] => US
[patent_app_date] => 2004-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 4777
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/565/07565577.pdf
[firstpage_image] =>[orig_patent_app_number] => 10895991
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/895991 | Method and apparatus for providing intelligent error messaging | Jul 21, 2004 | Issued |
Array
(
[id] => 384839
[patent_doc_number] => 07308605
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-12-11
[patent_title] => 'Latent error detection'
[patent_app_type] => utility
[patent_app_number] => 10/894825
[patent_app_country] => US
[patent_app_date] => 2004-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4870
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/308/07308605.pdf
[firstpage_image] =>[orig_patent_app_number] => 10894825
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/894825 | Latent error detection | Jul 19, 2004 | Issued |
Array
(
[id] => 5770860
[patent_doc_number] => 20060020853
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-01-26
[patent_title] => 'Switchover facilitation apparatus and method'
[patent_app_type] => utility
[patent_app_number] => 10/894744
[patent_app_country] => US
[patent_app_date] => 2004-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3449
[patent_no_of_claims] => 43
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0020/20060020853.pdf
[firstpage_image] =>[orig_patent_app_number] => 10894744
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/894744 | Switchover facilitation apparatus and method | Jul 19, 2004 | Abandoned |
Array
(
[id] => 7242730
[patent_doc_number] => 20040237628
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-02
[patent_title] => 'Method for operating a circuit arrangement containing a microcontroller and an eeprom'
[patent_app_type] => new
[patent_app_number] => 10/488719
[patent_app_country] => US
[patent_app_date] => 2004-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3495
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0237/20040237628.pdf
[firstpage_image] =>[orig_patent_app_number] => 10488719
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/488719 | Method for operating a circuit arrangement containing a microcontroller and an eeprom | Jul 13, 2004 | Abandoned |
Array
(
[id] => 7333547
[patent_doc_number] => 20040255197
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-16
[patent_title] => 'Multi-staged bios-based memory testing'
[patent_app_type] => new
[patent_app_number] => 10/890849
[patent_app_country] => US
[patent_app_date] => 2004-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4027
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 14
[patent_words_short_claim] => 35
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0255/20040255197.pdf
[firstpage_image] =>[orig_patent_app_number] => 10890849
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/890849 | Multi-staged bios-based memory testing | Jul 12, 2004 | Abandoned |