
Bryce P. Bonzo
Supervisory Patent Examiner (ID: 6395, Phone: (571)272-3655 , Office: P/2113 )
| Most Active Art Unit | 2113 |
| Art Unit(s) | 2114, 2113, 2184, 2785 |
| Total Applications | 938 |
| Issued Applications | 812 |
| Pending Applications | 32 |
| Abandoned Applications | 97 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8868198
[patent_doc_number] => 20130151901
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-06-13
[patent_title] => 'High Volume Recording of Instrumentation Data Varying Instrumentation Volumes to Prevent Data Loss'
[patent_app_type] => utility
[patent_app_number] => 12/974619
[patent_app_country] => US
[patent_app_date] => 2010-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5297
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12974619
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/974619 | High volume recording of instrumentation data varying instrumentation volumes to prevent data loss | Dec 20, 2010 | Issued |
Array
(
[id] => 8242515
[patent_doc_number] => 20120151253
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-06-14
[patent_title] => 'SYSTEM AND METHOD FOR MAINTAINING A DATA REDUNDANCY SCHEME IN A SOLID STATE MEMORY IN THE EVENT OF A POWER LOSS'
[patent_app_type] => utility
[patent_app_number] => 12/967206
[patent_app_country] => US
[patent_app_date] => 2010-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/967206 | System and method for maintaining a data redundancy scheme in a solid state memory in the event of a power loss | Dec 13, 2010 | Issued |
Array
(
[id] => 8242542
[patent_doc_number] => 20120151276
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-06-14
[patent_title] => 'Early Detection of Failing Computers'
[patent_app_type] => utility
[patent_app_number] => 12/965934
[patent_app_country] => US
[patent_app_date] => 2010-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12965934
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/965934 | Early detection of failing computers | Dec 12, 2010 | Issued |
Array
(
[id] => 9235997
[patent_doc_number] => 08601313
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-12-03
[patent_title] => 'System and method for a data reliability scheme in a solid state memory'
[patent_app_type] => utility
[patent_app_number] => 12/966892
[patent_app_country] => US
[patent_app_date] => 2010-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/966892 | System and method for a data reliability scheme in a solid state memory | Dec 12, 2010 | Issued |
Array
(
[id] => 8242543
[patent_doc_number] => 20120151278
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-06-14
[patent_title] => 'ADVANCED MANAGEMENT OF RUNTIME ERRORS'
[patent_app_type] => utility
[patent_app_number] => 12/965973
[patent_app_country] => US
[patent_app_date] => 2010-12-13
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/965973 | Advanced management of runtime errors | Dec 12, 2010 | Issued |
Array
(
[id] => 9555707
[patent_doc_number] => 08762779
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-06-24
[patent_title] => 'Multi-core processor with external instruction execution rate heartbeat'
[patent_app_type] => utility
[patent_app_number] => 12/964949
[patent_app_country] => US
[patent_app_date] => 2010-12-10
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/964949 | Multi-core processor with external instruction execution rate heartbeat | Dec 9, 2010 | Issued |
Array
(
[id] => 8775472
[patent_doc_number] => 08429448
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-04-23
[patent_title] => 'Systems and methods for dynamic transaction migration in an event-driven, multi-silo architecture'
[patent_app_type] => utility
[patent_app_number] => 12/965511
[patent_app_country] => US
[patent_app_date] => 2010-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12965511
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/965511 | Systems and methods for dynamic transaction migration in an event-driven, multi-silo architecture | Dec 9, 2010 | Issued |
Array
(
[id] => 8872996
[patent_doc_number] => 08468383
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-06-18
[patent_title] => 'Reduced power failover system'
[patent_app_type] => utility
[patent_app_number] => 12/963383
[patent_app_country] => US
[patent_app_date] => 2010-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/963383 | Reduced power failover system | Dec 7, 2010 | Issued |
Array
(
[id] => 8230050
[patent_doc_number] => 20120144253
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-06-07
[patent_title] => 'HARD MEMORY ARRAY FAILURE RECOVERY UTILIZING LOCKING STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 12/961947
[patent_app_country] => US
[patent_app_date] => 2010-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12961947
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/961947 | Hard memory array failure recovery utilizing locking structure | Dec 6, 2010 | Issued |
Array
(
[id] => 8716198
[patent_doc_number] => 08402349
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-03-19
[patent_title] => 'Two dimensional data randomization for a memory'
[patent_app_type] => utility
[patent_app_number] => 12/961272
[patent_app_country] => US
[patent_app_date] => 2010-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/961272 | Two dimensional data randomization for a memory | Dec 5, 2010 | Issued |
Array
(
[id] => 8143553
[patent_doc_number] => 20120096321
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-04-19
[patent_title] => 'BLOCK MANAGEMENT METHOD, MEMORY CONTROLLER, AND MEMORY STORAGE APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 12/960546
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[firstpage_image] =>[orig_patent_app_number] => 12960546
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/960546 | Block management method, memory controller, and memory storage apparatus | Dec 5, 2010 | Issued |
Array
(
[id] => 8861583
[patent_doc_number] => 08464137
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-06-11
[patent_title] => 'Probabilistic multi-tier error correction in not-and (NAND) flash memory'
[patent_app_type] => utility
[patent_app_number] => 12/960004
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/960004 | Probabilistic multi-tier error correction in not-and (NAND) flash memory | Dec 2, 2010 | Issued |
Array
(
[id] => 9062931
[patent_doc_number] => 08549385
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[patent_kind] => B2
[patent_issue_date] => 2013-10-01
[patent_title] => 'Soft decoding for quantizied channel'
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[patent_app_number] => 12/959891
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Array
(
[id] => 8787126
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[patent_title] => 'Coding across data blocks to reduce write amplification in NAND flash'
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Array
(
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[patent_title] => 'Reliable packet cut-through'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/958745 | Reliable packet cut-through | Dec 1, 2010 | Issued |
Array
(
[id] => 7542942
[patent_doc_number] => 08060791
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[patent_issue_date] => 2011-11-15
[patent_title] => 'Annotating GUI test automation playback and debugging'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/906842 | Annotating GUI test automation playback and debugging | Oct 17, 2010 | Issued |
Array
(
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[patent_title] => 'Multi-tier recovery'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/895840 | Multi-tier recovery | Sep 29, 2010 | Issued |
Array
(
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Array
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[patent_title] => 'REGISTRY KEY FEDERATION SYSTEMS AND METHODS'
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Array
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[patent_title] => 'Method and system to extract a navigation model for analysis of a web application'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/895323 | Method and system to extract a navigation model for analysis of a web application | Sep 29, 2010 | Issued |