Search

Burton S Mullins

Examiner (ID: 6347)

Most Active Art Unit
2834
Art Unit(s)
2832, 3621, 2102, 2834
Total Applications
2967
Issued Applications
2202
Pending Applications
136
Abandoned Applications
581

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4017731 [patent_doc_number] => 05906882 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-25 [patent_title] => 'Dielectric materials high metallic content' [patent_app_type] => 1 [patent_app_number] => 9/080097 [patent_app_country] => US [patent_app_date] => 1998-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 2162 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/906/05906882.pdf [firstpage_image] =>[orig_patent_app_number] => 080097 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/080097
Dielectric materials high metallic content May 17, 1998 Issued
Array ( [id] => 3857791 [patent_doc_number] => 05767572 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-16 [patent_title] => 'Semiconductor integrated circuit device assembly' [patent_app_type] => 1 [patent_app_number] => 8/810219 [patent_app_country] => US [patent_app_date] => 1997-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 3226 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/767/05767572.pdf [firstpage_image] =>[orig_patent_app_number] => 810219 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/810219
Semiconductor integrated circuit device assembly Feb 27, 1997 Issued
Array ( [id] => 3834182 [patent_doc_number] => 05760429 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-02 [patent_title] => 'Multi-layer wiring structure having varying-sized cutouts' [patent_app_type] => 1 [patent_app_number] => 8/834303 [patent_app_country] => US [patent_app_date] => 1997-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 56 [patent_no_of_words] => 10229 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/760/05760429.pdf [firstpage_image] =>[orig_patent_app_number] => 834303 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/834303
Multi-layer wiring structure having varying-sized cutouts Feb 17, 1997 Issued
Array ( [id] => 3879230 [patent_doc_number] => 05763933 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-09 [patent_title] => 'Nanofabricated structures having a region of changeable conductivity' [patent_app_type] => 1 [patent_app_number] => 8/775985 [patent_app_country] => US [patent_app_date] => 1997-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3999 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/763/05763933.pdf [firstpage_image] =>[orig_patent_app_number] => 775985 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/775985
Nanofabricated structures having a region of changeable conductivity Jan 2, 1997 Issued
Array ( [id] => 4013737 [patent_doc_number] => 05889328 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-30 [patent_title] => 'Refractory metal capped low resistivity metal conductor lines and vias' [patent_app_type] => 1 [patent_app_number] => 8/753991 [patent_app_country] => US [patent_app_date] => 1996-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 24 [patent_no_of_words] => 6672 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/889/05889328.pdf [firstpage_image] =>[orig_patent_app_number] => 753991 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/753991
Refractory metal capped low resistivity metal conductor lines and vias Dec 2, 1996 Issued
Array ( [id] => 3799859 [patent_doc_number] => 05780929 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-14 [patent_title] => 'Formation of silicided junctions in deep submicron MOSFETS by defect enhanced CoSi2 formation' [patent_app_type] => 1 [patent_app_number] => 8/744132 [patent_app_country] => US [patent_app_date] => 1996-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1468 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/780/05780929.pdf [firstpage_image] =>[orig_patent_app_number] => 744132 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/744132
Formation of silicided junctions in deep submicron MOSFETS by defect enhanced CoSi2 formation Nov 4, 1996 Issued
Array ( [id] => 3834023 [patent_doc_number] => 05760421 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-02 [patent_title] => 'Semiconductor device including indices for identifying positions of elements in the device.' [patent_app_type] => 1 [patent_app_number] => 8/739061 [patent_app_country] => US [patent_app_date] => 1996-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 26 [patent_no_of_words] => 3640 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/760/05760421.pdf [firstpage_image] =>[orig_patent_app_number] => 739061 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/739061
Semiconductor device including indices for identifying positions of elements in the device. Oct 27, 1996 Issued
Array ( [id] => 3845660 [patent_doc_number] => 05744858 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-28 [patent_title] => 'Semiconductor packaging technique yielding increased inner lead count for a given die-receiving area' [patent_app_type] => 1 [patent_app_number] => 8/720219 [patent_app_country] => US [patent_app_date] => 1996-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 24 [patent_no_of_words] => 6810 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/744/05744858.pdf [firstpage_image] =>[orig_patent_app_number] => 720219 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/720219
Semiconductor packaging technique yielding increased inner lead count for a given die-receiving area Sep 25, 1996 Issued
Array ( [id] => 3733212 [patent_doc_number] => 05670826 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-23 [patent_title] => 'Method for mounting a semiconductor device on a circuit board using a conductive adhesive and a thermosetting resin, and a circuit board with a semiconductor device mounted thereon using the method' [patent_app_type] => 1 [patent_app_number] => 8/709606 [patent_app_country] => US [patent_app_date] => 1996-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2800 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/670/05670826.pdf [firstpage_image] =>[orig_patent_app_number] => 709606 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/709606
Method for mounting a semiconductor device on a circuit board using a conductive adhesive and a thermosetting resin, and a circuit board with a semiconductor device mounted thereon using the method Sep 8, 1996 Issued
Array ( [id] => 3728243 [patent_doc_number] => 05672901 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-30 [patent_title] => 'Structure for interconnecting different polysilicon zones on semiconductor substrates for integrated circuits' [patent_app_type] => 1 [patent_app_number] => 8/702863 [patent_app_country] => US [patent_app_date] => 1996-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 16 [patent_no_of_words] => 2915 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/672/05672901.pdf [firstpage_image] =>[orig_patent_app_number] => 702863 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/702863
Structure for interconnecting different polysilicon zones on semiconductor substrates for integrated circuits Aug 25, 1996 Issued
Array ( [id] => 3706000 [patent_doc_number] => 05646448 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-08 [patent_title] => 'Copper pellet for reducing electromigration effects associated with a conductive via in a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/699821 [patent_app_country] => US [patent_app_date] => 1996-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3592 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/646/05646448.pdf [firstpage_image] =>[orig_patent_app_number] => 699821 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/699821
Copper pellet for reducing electromigration effects associated with a conductive via in a semiconductor device Aug 18, 1996 Issued
Array ( [id] => 3865664 [patent_doc_number] => 05796137 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-18 [patent_title] => 'Semiconductor memory device having capacitor of thin film transistor structure' [patent_app_type] => 1 [patent_app_number] => 8/694668 [patent_app_country] => US [patent_app_date] => 1996-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 4699 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/796/05796137.pdf [firstpage_image] =>[orig_patent_app_number] => 694668 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/694668
Semiconductor memory device having capacitor of thin film transistor structure Aug 8, 1996 Issued
Array ( [id] => 3669003 [patent_doc_number] => 05668410 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-16 [patent_title] => 'Projecting electrode structure having a double-layer conductive layer' [patent_app_type] => 1 [patent_app_number] => 8/686325 [patent_app_country] => US [patent_app_date] => 1996-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 14 [patent_no_of_words] => 2888 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/668/05668410.pdf [firstpage_image] =>[orig_patent_app_number] => 686325 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/686325
Projecting electrode structure having a double-layer conductive layer Jul 24, 1996 Issued
Array ( [id] => 3626204 [patent_doc_number] => 05689134 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-18 [patent_title] => 'Integrated circuit structure having reduced cross-talk and method of making same' [patent_app_type] => 1 [patent_app_number] => 8/685772 [patent_app_country] => US [patent_app_date] => 1996-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3131 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/689/05689134.pdf [firstpage_image] =>[orig_patent_app_number] => 685772 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/685772
Integrated circuit structure having reduced cross-talk and method of making same Jul 23, 1996 Issued
Array ( [id] => 3698421 [patent_doc_number] => 05661319 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-26 [patent_title] => 'Semiconductor device having capacitor' [patent_app_type] => 1 [patent_app_number] => 8/681093 [patent_app_country] => US [patent_app_date] => 1996-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3636 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/661/05661319.pdf [firstpage_image] =>[orig_patent_app_number] => 681093 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/681093
Semiconductor device having capacitor Jul 21, 1996 Issued
08/683146 SEMICONDUCTOR DEVICE COMPRISING A PLURALITY OF INTERCONNECTION PATTERNS Jul 17, 1996 Abandoned
Array ( [id] => 3750602 [patent_doc_number] => 05717231 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-10 [patent_title] => 'Antenna having elements with improved thermal impedance' [patent_app_type] => 1 [patent_app_number] => 8/680892 [patent_app_country] => US [patent_app_date] => 1996-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 17 [patent_no_of_words] => 4296 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/717/05717231.pdf [firstpage_image] =>[orig_patent_app_number] => 680892 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/680892
Antenna having elements with improved thermal impedance Jul 15, 1996 Issued
Array ( [id] => 3882869 [patent_doc_number] => 05747875 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-05 [patent_title] => 'Semiconductor power module with high speed operation and miniaturization' [patent_app_type] => 1 [patent_app_number] => 8/675337 [patent_app_country] => US [patent_app_date] => 1996-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 9726 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/747/05747875.pdf [firstpage_image] =>[orig_patent_app_number] => 675337 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/675337
Semiconductor power module with high speed operation and miniaturization Jul 1, 1996 Issued
Array ( [id] => 3707375 [patent_doc_number] => 05675186 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-07 [patent_title] => 'Construction that prevents the undercut of interconnect lines in plasma metal etch systems' [patent_app_type] => 1 [patent_app_number] => 8/672683 [patent_app_country] => US [patent_app_date] => 1996-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1507 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/675/05675186.pdf [firstpage_image] =>[orig_patent_app_number] => 672683 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/672683
Construction that prevents the undercut of interconnect lines in plasma metal etch systems Jun 27, 1996 Issued
Array ( [id] => 3751642 [patent_doc_number] => 05801663 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'Pane antenna having at least one wire-like antenna conductor combined with a set of heating wires' [patent_app_type] => 1 [patent_app_number] => 8/665081 [patent_app_country] => US [patent_app_date] => 1996-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 23 [patent_no_of_words] => 5690 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/801/05801663.pdf [firstpage_image] =>[orig_patent_app_number] => 665081 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/665081
Pane antenna having at least one wire-like antenna conductor combined with a set of heating wires Jun 13, 1996 Issued
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