Search

Byron S. Everhart

Examiner (ID: 12669)

Most Active Art Unit
1104
Art Unit(s)
1104, 1109
Total Applications
352
Issued Applications
236
Pending Applications
3
Abandoned Applications
113

Applications

Application numberTitle of the applicationFiling DateStatus
07/424796 METHOD FOR FORMING A THIN FILM AND APPARATUS OF FORMING A METAL THIN FILM UTILIZING TEMPERATURE CONTROLLING MEANS Oct 19, 1989 Abandoned
Array ( [id] => 2734622 [patent_doc_number] => 05077229 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-31 [patent_title] => 'Monolithic chemical sensor of the CHEMFET type incorporating an ion-selective membrane and method of making the same' [patent_app_type] => 1 [patent_app_number] => 7/417237 [patent_app_country] => US [patent_app_date] => 1989-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 1568 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/077/05077229.pdf [firstpage_image] =>[orig_patent_app_number] => 417237 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/417237
Monolithic chemical sensor of the CHEMFET type incorporating an ion-selective membrane and method of making the same Oct 4, 1989 Issued
07/416750 HIGH-FREQUENCY SEMICONDUCTOR WAFER PROCESSING APPARATUS AND METHOD Oct 2, 1989 Abandoned
Array ( [id] => 2708310 [patent_doc_number] => 05017515 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-21 [patent_title] => 'Process for minimizing lateral distance between elements in an integrated circuit by using sidewall spacers' [patent_app_type] => 1 [patent_app_number] => 7/415807 [patent_app_country] => US [patent_app_date] => 1989-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 21 [patent_no_of_words] => 3304 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/017/05017515.pdf [firstpage_image] =>[orig_patent_app_number] => 415807 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/415807
Process for minimizing lateral distance between elements in an integrated circuit by using sidewall spacers Oct 1, 1989 Issued
07/413800 BORON PHOSPHORUS SILICATE GLASS COMPOSITE LAYER ON SEMICONDUCTOR WAFER AND IMPROVED METHOD FOR FORMING SAME Sep 27, 1989 Abandoned
07/413754 METHOD OF FABRICATING SEMICONDUCTOR DEVICES Sep 27, 1989 Abandoned
07/415384 METHOD OF PRODUCING A BIPOLAR TRANSISTOR AND BIPOLAR TRANSISTOR Sep 27, 1989 Abandoned
07/412479 METHOD FOR FORMING A PATTERN Sep 25, 1989 Abandoned
07/404927 REDUCED SIZE ETCHING METHOD FOR INTEGRATED CIRCUITS Sep 7, 1989 Abandoned
07/401369 DIELECTRIC FILM DEPOSITION METHOD AND APPARATUS Aug 30, 1989 Abandoned
07/400215 DEVICE PROCESSING INVOLVING AN OPTICAL INTERFEROMETRIC THERMOMETRY Aug 28, 1989 Abandoned
Array ( [id] => 2771811 [patent_doc_number] => 05075256 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-24 [patent_title] => 'Process for removing deposits from backside and end edge of semiconductor wafer while preventing removal of materials from front surface of wafer' [patent_app_type] => 1 [patent_app_number] => 7/398239 [patent_app_country] => US [patent_app_date] => 1989-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4334 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/075/05075256.pdf [firstpage_image] =>[orig_patent_app_number] => 398239 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/398239
Process for removing deposits from backside and end edge of semiconductor wafer while preventing removal of materials from front surface of wafer Aug 24, 1989 Issued
Array ( [id] => 3075715 [patent_doc_number] => 05322806 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-21 [patent_title] => 'Method of producing a semiconductor device using electron cyclotron resonance plasma CVD and substrate biasing' [patent_app_type] => 1 [patent_app_number] => 7/393950 [patent_app_country] => US [patent_app_date] => 1989-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 39 [patent_no_of_words] => 3524 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/322/05322806.pdf [firstpage_image] =>[orig_patent_app_number] => 393950 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/393950
Method of producing a semiconductor device using electron cyclotron resonance plasma CVD and substrate biasing Aug 14, 1989 Issued
Array ( [id] => 2595409 [patent_doc_number] => 04923828 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-05-08 [patent_title] => 'Gaseous cleaning method for silicon devices' [patent_app_type] => 1 [patent_app_number] => 7/390314 [patent_app_country] => US [patent_app_date] => 1989-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2689 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/923/04923828.pdf [firstpage_image] =>[orig_patent_app_number] => 390314 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/390314
Gaseous cleaning method for silicon devices Aug 6, 1989 Issued
Array ( [id] => 2641096 [patent_doc_number] => 04939105 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-07-03 [patent_title] => 'Planarizing contact etch' [patent_app_type] => 1 [patent_app_number] => 7/388841 [patent_app_country] => US [patent_app_date] => 1989-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 2062 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/939/04939105.pdf [firstpage_image] =>[orig_patent_app_number] => 388841 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/388841
Planarizing contact etch Aug 2, 1989 Issued
07/387921 DRY ETCHING METHOD FOR REFRACTORY METALS AND COMPOUNDS THEREOF Jul 31, 1989 Abandoned
07/391560 SEMICONDUCTOR APPARATUS Jul 24, 1989 Abandoned
Array ( [id] => 2706488 [patent_doc_number] => 05055423 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-08 [patent_title] => 'Planarized selective tungsten metallization system' [patent_app_type] => 1 [patent_app_number] => 7/383304 [patent_app_country] => US [patent_app_date] => 1989-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 4279 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/055/05055423.pdf [firstpage_image] =>[orig_patent_app_number] => 383304 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/383304
Planarized selective tungsten metallization system Jul 17, 1989 Issued
Array ( [id] => 2655348 [patent_doc_number] => 04929572 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-05-29 [patent_title] => 'Dopant of arsenic, method for the preparation thereof and method for doping of semiconductor therewith' [patent_app_type] => 1 [patent_app_number] => 7/380616 [patent_app_country] => US [patent_app_date] => 1989-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2467 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/929/04929572.pdf [firstpage_image] =>[orig_patent_app_number] => 380616 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/380616
Dopant of arsenic, method for the preparation thereof and method for doping of semiconductor therewith Jul 16, 1989 Issued
Array ( [id] => 2630920 [patent_doc_number] => 04937206 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-06-26 [patent_title] => 'Method and apparatus for preventing cross contamination of species during the processing of semiconductor wafers' [patent_app_type] => 1 [patent_app_number] => 7/377692 [patent_app_country] => US [patent_app_date] => 1989-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1743 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/937/04937206.pdf [firstpage_image] =>[orig_patent_app_number] => 377692 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/377692
Method and apparatus for preventing cross contamination of species during the processing of semiconductor wafers Jul 9, 1989 Issued
Menu