Search

Caleb E. Henry

Examiner (ID: 4374, Phone: (571)270-5370 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2818, 2894
Total Applications
1559
Issued Applications
1303
Pending Applications
119
Abandoned Applications
178

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10967656 [patent_doc_number] => 20140370689 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-18 [patent_title] => 'REACTION DEVICE AND MANUFACTURE METHOD FOR CHEMICAL VAPOR DEPOSITION' [patent_app_type] => utility [patent_app_number] => 14/096390 [patent_app_country] => US [patent_app_date] => 2013-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4196 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14096390 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/096390
Reaction device with peripheral-in and center-out design for chemical vapor deposition Dec 3, 2013 Issued
Array ( [id] => 10508420 [patent_doc_number] => 09236297 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-12 [patent_title] => 'Low tempature tungsten film deposition for small critical dimension contacts and interconnects' [patent_app_type] => utility [patent_app_number] => 14/097160 [patent_app_country] => US [patent_app_date] => 2013-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 23 [patent_no_of_words] => 10493 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14097160 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/097160
Low tempature tungsten film deposition for small critical dimension contacts and interconnects Dec 3, 2013 Issued
Array ( [id] => 9546127 [patent_doc_number] => 20140170776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'MTJ STACK AND BOTTOM ELECTRODE PATTERNING PROCESS WITH ION BEAM ETCHING USING A SINGLE MASK' [patent_app_type] => utility [patent_app_number] => 14/096016 [patent_app_country] => US [patent_app_date] => 2013-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3818 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14096016 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/096016
MTJ stack and bottom electrode patterning process with ion beam etching using a single mask Dec 3, 2013 Issued
Array ( [id] => 9396396 [patent_doc_number] => 20140093802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-03 [patent_title] => 'FUEL CELL MONITORING AND CONTROL SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/096616 [patent_app_country] => US [patent_app_date] => 2013-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6849 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14096616 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/096616
Method of controlling a fuel cell system using impedance determination Dec 3, 2013 Issued
Array ( [id] => 9518399 [patent_doc_number] => 20140154890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-05 [patent_title] => 'PERIPHERY COATING APPARATUS, PERIPHERY COATING METHOD AND STORAGE MEDIUM THEREFOR' [patent_app_type] => utility [patent_app_number] => 14/095054 [patent_app_country] => US [patent_app_date] => 2013-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9466 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14095054 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/095054
Periphery coating apparatus, periphery coating method and storage medium therefor Dec 2, 2013 Issued
Array ( [id] => 10100035 [patent_doc_number] => 09136355 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-15 [patent_title] => 'Methods for forming amorphous silicon thin film transistors' [patent_app_type] => utility [patent_app_number] => 14/095834 [patent_app_country] => US [patent_app_date] => 2013-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4000 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14095834 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/095834
Methods for forming amorphous silicon thin film transistors Dec 2, 2013 Issued
Array ( [id] => 10138498 [patent_doc_number] => 09171820 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-27 [patent_title] => 'Method of manufacturing semiconductor device including thermal compression' [patent_app_type] => utility [patent_app_number] => 14/095000 [patent_app_country] => US [patent_app_date] => 2013-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 7473 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14095000 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/095000
Method of manufacturing semiconductor device including thermal compression Dec 2, 2013 Issued
Array ( [id] => 9537802 [patent_doc_number] => 20140162449 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-12 [patent_title] => 'SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/094963 [patent_app_country] => US [patent_app_date] => 2013-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 8348 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14094963 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/094963
Semiconductor devices and methods of fabricating the same Dec 2, 2013 Issued
Array ( [id] => 10145048 [patent_doc_number] => 09177860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-03 [patent_title] => 'Method for processing at least one crystalline silicon-wafer with a thermal budget or a solar-cell wafer with a thermal budget by a laser beam' [patent_app_type] => utility [patent_app_number] => 14/094863 [patent_app_country] => US [patent_app_date] => 2013-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5258 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14094863 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/094863
Method for processing at least one crystalline silicon-wafer with a thermal budget or a solar-cell wafer with a thermal budget by a laser beam Dec 2, 2013 Issued
Array ( [id] => 11353598 [patent_doc_number] => 20160372338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-22 [patent_title] => 'ETCHING-BEFORE-PACKAGING HORIZONTAL CHIP 3D SYSTEM-LEVEL METAL CIRCUIT BOARD STRUCTURE AND TECHNIQUE THEREOF' [patent_app_type] => utility [patent_app_number] => 14/901878 [patent_app_country] => US [patent_app_date] => 2013-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 11349 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14901878 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/901878
Etching-before-packaging horizontal chip 3D system-level metal circuit board structure and technique thereof Dec 1, 2013 Issued
Array ( [id] => 11564708 [patent_doc_number] => 09627303 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-18 [patent_title] => 'Etching-before-packaging three-dimensional system-level metal circuit board structure inversely provided with chip, and technological method' [patent_app_type] => utility [patent_app_number] => 14/901451 [patent_app_country] => US [patent_app_date] => 2013-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 83 [patent_no_of_words] => 10896 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 849 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14901451 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/901451
Etching-before-packaging three-dimensional system-level metal circuit board structure inversely provided with chip, and technological method Dec 1, 2013 Issued
Array ( [id] => 9515130 [patent_doc_number] => 20140151622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-05 [patent_title] => 'PHASE CHANGE MEMORY' [patent_app_type] => utility [patent_app_number] => 14/091487 [patent_app_country] => US [patent_app_date] => 2013-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4096 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14091487 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/091487
Superlattice phase change memory including Sb2Te3 layers containing Zr Nov 26, 2013 Issued
Array ( [id] => 10179176 [patent_doc_number] => 09209391 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-08 [patent_title] => 'Electronic memory device having an electrode made of a soluble material' [patent_app_type] => utility [patent_app_number] => 14/091623 [patent_app_country] => US [patent_app_date] => 2013-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 16 [patent_no_of_words] => 6810 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14091623 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/091623
Electronic memory device having an electrode made of a soluble material Nov 26, 2013 Issued
Array ( [id] => 10016372 [patent_doc_number] => 09059395 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-16 [patent_title] => 'Resistive random access memory devices having variable resistance layers and related methods' [patent_app_type] => utility [patent_app_number] => 14/090803 [patent_app_country] => US [patent_app_date] => 2013-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 60 [patent_figures_cnt] => 60 [patent_no_of_words] => 14961 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14090803 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/090803
Resistive random access memory devices having variable resistance layers and related methods Nov 25, 2013 Issued
Array ( [id] => 10093232 [patent_doc_number] => 09130064 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-08 [patent_title] => 'Method for fabricating leadframe-based semiconductor package with connecting pads top and bottom surfaces of carrier' [patent_app_type] => utility [patent_app_number] => 14/086142 [patent_app_country] => US [patent_app_date] => 2013-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 19 [patent_no_of_words] => 5096 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14086142 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/086142
Method for fabricating leadframe-based semiconductor package with connecting pads top and bottom surfaces of carrier Nov 20, 2013 Issued
Array ( [id] => 10740940 [patent_doc_number] => 20160087091 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-24 [patent_title] => 'INSULATING GATE FIELD-EFFECT TRANSISTOR DEVICE AND METHOD OF MAKING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/787545 [patent_app_country] => US [patent_app_date] => 2013-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 7421 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14787545 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/787545
Transistor and switching system comprising silicon carbide and oxides of varying thicknesses, and method for providing the same Nov 17, 2013 Issued
Array ( [id] => 9951021 [patent_doc_number] => 08999808 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-07 [patent_title] => 'Nonvolatile memory element and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 14/082237 [patent_app_country] => US [patent_app_date] => 2013-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 27 [patent_no_of_words] => 15000 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14082237 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/082237
Nonvolatile memory element and method for manufacturing the same Nov 17, 2013 Issued
Array ( [id] => 10016160 [patent_doc_number] => 09059181 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-16 [patent_title] => 'Wafer leveled chip packaging structure and method thereof' [patent_app_type] => utility [patent_app_number] => 14/083377 [patent_app_country] => US [patent_app_date] => 2013-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4851 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 286 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14083377 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/083377
Wafer leveled chip packaging structure and method thereof Nov 17, 2013 Issued
Array ( [id] => 10870149 [patent_doc_number] => 08895344 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-25 [patent_title] => 'Method of making a low stress cavity package for back side illuminated image sensor' [patent_app_type] => utility [patent_app_number] => 14/079751 [patent_app_country] => US [patent_app_date] => 2013-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3253 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14079751 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/079751
Method of making a low stress cavity package for back side illuminated image sensor Nov 13, 2013 Issued
Array ( [id] => 10850951 [patent_doc_number] => 08877630 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-11-04 [patent_title] => 'Semiconductor structure having a silver alloy bump body and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 14/078240 [patent_app_country] => US [patent_app_date] => 2013-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 15236 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14078240 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/078240
Semiconductor structure having a silver alloy bump body and manufacturing method thereof Nov 11, 2013 Issued
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