Search

Caleb E. Henry

Examiner (ID: 4374, Phone: (571)270-5370 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2818, 2894
Total Applications
1559
Issued Applications
1303
Pending Applications
119
Abandoned Applications
178

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9671136 [patent_doc_number] => 20140234999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-21 [patent_title] => 'METHOD FOR PROCESSING DEVICES INCLUDING QUANTUM DOTS AND DEVICES' [patent_app_type] => utility [patent_app_number] => 14/076409 [patent_app_country] => US [patent_app_date] => 2013-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 16416 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14076409 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/076409
Method for processing devices including quantum dots and devices Nov 10, 2013 Issued
Array ( [id] => 10041984 [patent_doc_number] => 09082697 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-14 [patent_title] => 'Variable resistive memory device including vertical channel PMOS transistor and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 14/076921 [patent_app_country] => US [patent_app_date] => 2013-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3090 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14076921 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/076921
Variable resistive memory device including vertical channel PMOS transistor and method of manufacturing the same Nov 10, 2013 Issued
Array ( [id] => 9844753 [patent_doc_number] => 08946670 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-02-03 [patent_title] => 'Three-dimensional semiconductor device, variable resistive memory device including the same, and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 14/075910 [patent_app_country] => US [patent_app_date] => 2013-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3076 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14075910 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/075910
Three-dimensional semiconductor device, variable resistive memory device including the same, and method of manufacturing the same Nov 7, 2013 Issued
Array ( [id] => 10245031 [patent_doc_number] => 20150130026 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-14 [patent_title] => 'PRINTING MINIMUM WIDTH FEATURES AT NON-MINIMUM PITCH AND RESULTING DEVICE' [patent_app_type] => utility [patent_app_number] => 14/074981 [patent_app_country] => US [patent_app_date] => 2013-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3328 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14074981 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/074981
Printing minimum width semiconductor features at non-minimum pitch and resulting device Nov 7, 2013 Issued
Array ( [id] => 10172072 [patent_doc_number] => 09202785 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-01 [patent_title] => 'Three dimensional integrated circuit capacitor having vias' [patent_app_type] => utility [patent_app_number] => 14/074972 [patent_app_country] => US [patent_app_date] => 2013-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4048 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14074972 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/074972
Three dimensional integrated circuit capacitor having vias Nov 7, 2013 Issued
Array ( [id] => 10010508 [patent_doc_number] => 09054033 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-09 [patent_title] => 'Semiconductor device having vertical channel, resistive memory device including the same, and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 14/074404 [patent_app_country] => US [patent_app_date] => 2013-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 5707 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14074404 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/074404
Semiconductor device having vertical channel, resistive memory device including the same, and method of manufacturing the same Nov 6, 2013 Issued
Array ( [id] => 9728533 [patent_doc_number] => 20140264241 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'ZnTe on TiN or Pt Electrodes as a Resistive Switching Element for ReRAM Applications' [patent_app_type] => utility [patent_app_number] => 14/073718 [patent_app_country] => US [patent_app_date] => 2013-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8704 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14073718 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/073718
ZnTe on TiN or Pt electodes with a portion operable as a current limiting layer for ReRAM applications Nov 5, 2013 Issued
Array ( [id] => 10158614 [patent_doc_number] => 09190398 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-17 [patent_title] => 'Method for packaging an optical module' [patent_app_type] => utility [patent_app_number] => 14/073567 [patent_app_country] => US [patent_app_date] => 2013-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1717 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14073567 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/073567
Method for packaging an optical module Nov 5, 2013 Issued
Array ( [id] => 10053680 [patent_doc_number] => 09093567 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-28 [patent_title] => 'Diodes with multiple junctions and fabrication methods therefor' [patent_app_type] => utility [patent_app_number] => 14/072151 [patent_app_country] => US [patent_app_date] => 2013-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8909 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14072151 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/072151
Diodes with multiple junctions and fabrication methods therefor Nov 4, 2013 Issued
Array ( [id] => 10238152 [patent_doc_number] => 20150123146 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-07 [patent_title] => 'INCREASED SPACE BETWEEN EPITAXY ON ADJACENT FINS OF FINFET' [patent_app_type] => utility [patent_app_number] => 14/071170 [patent_app_country] => US [patent_app_date] => 2013-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3272 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14071170 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/071170
Semiconductor structure with increased space and volume between shaped epitaxial structures Nov 3, 2013 Issued
Array ( [id] => 9923367 [patent_doc_number] => 08981334 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-03-17 [patent_title] => 'Memory cells having regions containing one or both of carbon and boron' [patent_app_type] => utility [patent_app_number] => 14/070407 [patent_app_country] => US [patent_app_date] => 2013-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3658 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14070407 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/070407
Memory cells having regions containing one or both of carbon and boron Oct 31, 2013 Issued
Array ( [id] => 10230461 [patent_doc_number] => 20150115455 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-30 [patent_title] => 'STACKED 3D MEMORY' [patent_app_type] => utility [patent_app_number] => 14/069151 [patent_app_country] => US [patent_app_date] => 2013-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7444 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14069151 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/069151
Stacked 3D memory with isolation layer between memory blocks and access conductors coupled to decoding elements in memory blocks Oct 30, 2013 Issued
Array ( [id] => 10230335 [patent_doc_number] => 20150115329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-30 [patent_title] => 'Method and Apparatus for Repairing Monolithic Stacked Integrated Circuits' [patent_app_type] => utility [patent_app_number] => 14/068187 [patent_app_country] => US [patent_app_date] => 2013-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5518 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14068187 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/068187
Repairing monolithic stacked integrated circuits with a redundant layer and lithography process Oct 30, 2013 Issued
Array ( [id] => 10144978 [patent_doc_number] => 09177790 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-03 [patent_title] => 'Inkjet printing in a peripheral region of a substrate' [patent_app_type] => utility [patent_app_number] => 14/067661 [patent_app_country] => US [patent_app_date] => 2013-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 6179 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14067661 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/067661
Inkjet printing in a peripheral region of a substrate Oct 29, 2013 Issued
Array ( [id] => 9460301 [patent_doc_number] => 20140124726 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-08 [patent_title] => 'PHASE-CHANGE MEMORY DEVICES AND METHODS OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/067228 [patent_app_country] => US [patent_app_date] => 2013-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 12109 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14067228 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/067228
Phase-change memory devices including thermally-isolated phase-change layers and methods of fabricating the same Oct 29, 2013 Issued
Array ( [id] => 10230406 [patent_doc_number] => 20150115400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-30 [patent_title] => 'SELF-CORRECTING POWER GRID FOR SEMICONDUCTOR STRUCTURES METHOD' [patent_app_type] => utility [patent_app_number] => 14/065777 [patent_app_country] => US [patent_app_date] => 2013-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4985 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14065777 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/065777
Self-correcting power grid for semiconductor structures method Oct 28, 2013 Issued
Array ( [id] => 10230321 [patent_doc_number] => 20150115315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-30 [patent_title] => 'High Voltage Semiconductor Power Switching Device' [patent_app_type] => utility [patent_app_number] => 14/064843 [patent_app_country] => US [patent_app_date] => 2013-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 11087 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14064843 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/064843
High voltage semiconductor power switching device Oct 27, 2013 Issued
Array ( [id] => 9565721 [patent_doc_number] => 20140183434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'VARIABLE RESISTANCE MEMORY DEVICES AND METHODS OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/064826 [patent_app_country] => US [patent_app_date] => 2013-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 8515 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14064826 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/064826
VARIABLE RESISTANCE MEMORY DEVICES AND METHODS OF FORMING THE SAME Oct 27, 2013 Abandoned
Array ( [id] => 10232045 [patent_doc_number] => 20150117039 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-30 [patent_title] => 'Substrate Gap Mounted LED' [patent_app_type] => utility [patent_app_number] => 14/063933 [patent_app_country] => US [patent_app_date] => 2013-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2668 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14063933 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/063933
Substrate Gap Mounted LED Oct 24, 2013 Abandoned
Array ( [id] => 9474217 [patent_doc_number] => 20140131680 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-15 [patent_title] => 'ORGANIC ELECTROLUMINESCENCE DEVICE' [patent_app_type] => utility [patent_app_number] => 14/063701 [patent_app_country] => US [patent_app_date] => 2013-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 23762 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14063701 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/063701
ORGANIC ELECTROLUMINESCENCE DEVICE Oct 24, 2013 Abandoned
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