Search

Caleb E. Henry

Examiner (ID: 13871, Phone: (571)270-5370 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2818, 2894
Total Applications
1607
Issued Applications
1337
Pending Applications
112
Abandoned Applications
182

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 82833 [patent_doc_number] => 07745902 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-06-29 [patent_title] => 'System and method for providing improved trench isolation of semiconductor devices' [patent_app_type] => utility [patent_app_number] => 11/903349 [patent_app_country] => US [patent_app_date] => 2007-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 28 [patent_no_of_words] => 3697 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/745/07745902.pdf [firstpage_image] =>[orig_patent_app_number] => 11903349 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/903349
System and method for providing improved trench isolation of semiconductor devices Sep 20, 2007 Issued
Array ( [id] => 4789509 [patent_doc_number] => 20080290482 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-27 [patent_title] => 'METHOD OF PACKAGING INTEGRATED CIRCUITS' [patent_app_type] => utility [patent_app_number] => 11/858032 [patent_app_country] => US [patent_app_date] => 2007-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6872 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0290/20080290482.pdf [firstpage_image] =>[orig_patent_app_number] => 11858032 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/858032
METHOD OF PACKAGING INTEGRATED CIRCUITS Sep 18, 2007 Abandoned
Array ( [id] => 8932340 [patent_doc_number] => 08492037 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-23 [patent_title] => 'Fuel cell system having wet-state determination' [patent_app_type] => utility [patent_app_number] => 12/304931 [patent_app_country] => US [patent_app_date] => 2007-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 6650 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 380 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12304931 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/304931
Fuel cell system having wet-state determination Aug 8, 2007 Issued
Array ( [id] => 6322448 [patent_doc_number] => 20100196794 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-05 [patent_title] => 'ELECTRODE FOR FUEL CELL, METHOD FOR PRODUCING THE SAME, AND FUEL CELL' [patent_app_type] => utility [patent_app_number] => 12/376468 [patent_app_country] => US [patent_app_date] => 2007-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 7710 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0196/20100196794.pdf [firstpage_image] =>[orig_patent_app_number] => 12376468 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/376468
ELECTRODE FOR FUEL CELL, METHOD FOR PRODUCING THE SAME, AND FUEL CELL Aug 5, 2007 Abandoned
Array ( [id] => 6470481 [patent_doc_number] => 20100040917 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-18 [patent_title] => 'FUEL CELL SYSTEM AND METHOD OF STARTING A FUEL CELL SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/440217 [patent_app_country] => US [patent_app_date] => 2007-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2496 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0040/20100040917.pdf [firstpage_image] =>[orig_patent_app_number] => 12440217 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/440217
FUEL CELL SYSTEM AND METHOD OF STARTING A FUEL CELL SYSTEM Jul 31, 2007 Abandoned
Array ( [id] => 5485175 [patent_doc_number] => 20090274940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-05 [patent_title] => 'FUEL CELL AND FUEL CELL SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/375460 [patent_app_country] => US [patent_app_date] => 2007-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 28265 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0274/20090274940.pdf [firstpage_image] =>[orig_patent_app_number] => 12375460 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/375460
FUEL CELL AND FUEL CELL SYSTEM Jul 26, 2007 Abandoned
Array ( [id] => 6235490 [patent_doc_number] => 20100267194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-21 [patent_title] => 'METHOD FOR APPLYING ELECTRICAL CONTACTS ON SEMICONDUCTING SUBSTRATES, SEMICONDUCTING SUBSTRATE AND USE OF THE METHOD' [patent_app_type] => utility [patent_app_number] => 12/439639 [patent_app_country] => US [patent_app_date] => 2007-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2226 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0267/20100267194.pdf [firstpage_image] =>[orig_patent_app_number] => 12439639 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/439639
METHOD FOR APPLYING ELECTRICAL CONTACTS ON SEMICONDUCTING SUBSTRATES, SEMICONDUCTING SUBSTRATE AND USE OF THE METHOD Jun 25, 2007 Abandoned
Array ( [id] => 6294076 [patent_doc_number] => 20100239939 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'TUBE-TYPE FUEL CELL' [patent_app_type] => utility [patent_app_number] => 12/303974 [patent_app_country] => US [patent_app_date] => 2007-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5752 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0239/20100239939.pdf [firstpage_image] =>[orig_patent_app_number] => 12303974 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/303974
TUBE-TYPE FUEL CELL Jun 18, 2007 Abandoned
Array ( [id] => 5391772 [patent_doc_number] => 20090209085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-20 [patent_title] => 'METHOD FOR REUSING DELAMINATED WAFER' [patent_app_type] => utility [patent_app_number] => 12/308990 [patent_app_country] => US [patent_app_date] => 2007-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5343 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0209/20090209085.pdf [firstpage_image] =>[orig_patent_app_number] => 12308990 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/308990
METHOD FOR REUSING DELAMINATED WAFER Jun 7, 2007 Abandoned
Array ( [id] => 7724650 [patent_doc_number] => 08097922 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-01-17 [patent_title] => 'Nanometer-scale transistor architecture providing enhanced carrier mobility' [patent_app_type] => utility [patent_app_number] => 11/754618 [patent_app_country] => US [patent_app_date] => 2007-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4394 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/097/08097922.pdf [firstpage_image] =>[orig_patent_app_number] => 11754618 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/754618
Nanometer-scale transistor architecture providing enhanced carrier mobility May 28, 2007 Issued
Array ( [id] => 4789508 [patent_doc_number] => 20080290481 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-27 [patent_title] => 'Semiconductor Device Package Leadframe' [patent_app_type] => utility [patent_app_number] => 11/754108 [patent_app_country] => US [patent_app_date] => 2007-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2402 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0290/20080290481.pdf [firstpage_image] =>[orig_patent_app_number] => 11754108 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/754108
Semiconductor Device Package Leadframe May 24, 2007 Abandoned
Array ( [id] => 7967701 [patent_doc_number] => 07939883 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-10 [patent_title] => 'Voltage regulating apparatus having a reduced current consumption and settling time' [patent_app_type] => utility [patent_app_number] => 11/754129 [patent_app_country] => US [patent_app_date] => 2007-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4024 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 316 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/939/07939883.pdf [firstpage_image] =>[orig_patent_app_number] => 11754129 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/754129
Voltage regulating apparatus having a reduced current consumption and settling time May 24, 2007 Issued
11/754139 METHOD OF PACKAGING INTEGRATED CIRCUITS May 24, 2007 Abandoned
Array ( [id] => 6265413 [patent_doc_number] => 20100297781 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-25 [patent_title] => 'METHOD FOR MANUFACTURING MEMS STRUCTURES' [patent_app_type] => utility [patent_app_number] => 12/308530 [patent_app_country] => US [patent_app_date] => 2007-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2451 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0297/20100297781.pdf [firstpage_image] =>[orig_patent_app_number] => 12308530 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/308530
METHOD FOR MANUFACTURING MEMS STRUCTURES May 22, 2007 Abandoned
Array ( [id] => 4789439 [patent_doc_number] => 20080290412 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-27 [patent_title] => 'SUPPRESSING SHORT CHANNEL EFFECTS' [patent_app_type] => utility [patent_app_number] => 11/751959 [patent_app_country] => US [patent_app_date] => 2007-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4688 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0290/20080290412.pdf [firstpage_image] =>[orig_patent_app_number] => 11751959 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/751959
Semiconductor device including an arrangement for suppressing short channel effects May 21, 2007 Issued
Array ( [id] => 5082928 [patent_doc_number] => 20070272979 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-29 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/748869 [patent_app_country] => US [patent_app_date] => 2007-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 46 [patent_no_of_words] => 16298 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0272/20070272979.pdf [firstpage_image] =>[orig_patent_app_number] => 11748869 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/748869
Semiconductor device having superjunction structure formed of p-type and n-type pillar regions May 14, 2007 Issued
Array ( [id] => 5088825 [patent_doc_number] => 20070228464 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'MOS transistor' [patent_app_type] => utility [patent_app_number] => 11/748479 [patent_app_country] => US [patent_app_date] => 2007-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4073 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0228/20070228464.pdf [firstpage_image] =>[orig_patent_app_number] => 11748479 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/748479
MOS transistor May 13, 2007 Abandoned
Array ( [id] => 4837710 [patent_doc_number] => 20080278213 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-13 [patent_title] => 'HIGH OHMIC INTEGRATED RESISTOR WITH IMPROVED LINEARITY' [patent_app_type] => utility [patent_app_number] => 11/746949 [patent_app_country] => US [patent_app_date] => 2007-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3590 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0278/20080278213.pdf [firstpage_image] =>[orig_patent_app_number] => 11746949 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/746949
High ohmic integrated resistor with improved linearity May 9, 2007 Issued
Array ( [id] => 4876636 [patent_doc_number] => 20080150019 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'PROFILED GATE FIELD EFFECT TRANSISTOR WITH ENHANCED HIGH HARMONIC GAIN' [patent_app_type] => utility [patent_app_number] => 11/746088 [patent_app_country] => US [patent_app_date] => 2007-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3227 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0150/20080150019.pdf [firstpage_image] =>[orig_patent_app_number] => 11746088 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/746088
Profiled gate field effect transistor with enhanced high harmonic gain May 8, 2007 Issued
Array ( [id] => 5582712 [patent_doc_number] => 20090101914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-23 [patent_title] => 'Semiconductor Image Sensing Device' [patent_app_type] => utility [patent_app_number] => 12/227159 [patent_app_country] => US [patent_app_date] => 2007-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11649 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0101/20090101914.pdf [firstpage_image] =>[orig_patent_app_number] => 12227159 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/227159
Semiconductor Image Sensing Device May 7, 2007 Abandoned
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