Search

Caleb E. Henry

Examiner (ID: 13871, Phone: (571)270-5370 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2818, 2894
Total Applications
1607
Issued Applications
1337
Pending Applications
112
Abandoned Applications
182

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7763515 [patent_doc_number] => 08115251 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-14 [patent_title] => 'Recessed gate channel with low Vt corner' [patent_app_type] => utility [patent_app_number] => 11/741898 [patent_app_country] => US [patent_app_date] => 2007-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 33 [patent_no_of_words] => 8674 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/115/08115251.pdf [firstpage_image] =>[orig_patent_app_number] => 11741898 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/741898
Recessed gate channel with low Vt corner Apr 29, 2007 Issued
Array ( [id] => 4856494 [patent_doc_number] => 20080265344 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-30 [patent_title] => 'METHOD OF SIMULTANEOUSLY SILICIDING A POLYSILICON GATE AND SOURCE/DRAIN OF A SEMICONDUCTOR DEVICE, AND RELATED DEVICE' [patent_app_type] => utility [patent_app_number] => 11/741519 [patent_app_country] => US [patent_app_date] => 2007-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6887 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0265/20080265344.pdf [firstpage_image] =>[orig_patent_app_number] => 11741519 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/741519
Method of simultaneously siliciding a polysilicon gate and source/drain of a semiconductor device, and related device Apr 26, 2007 Issued
Array ( [id] => 5165657 [patent_doc_number] => 20070287244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-13 [patent_title] => 'ALTERNATIVE INTEGRATION SCHEME FOR CMOS S/D SiGe PROCESS' [patent_app_type] => utility [patent_app_number] => 11/739099 [patent_app_country] => US [patent_app_date] => 2007-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9489 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0287/20070287244.pdf [firstpage_image] =>[orig_patent_app_number] => 11739099 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/739099
ALTERNATIVE INTEGRATION SCHEME FOR CMOS S/D SiGe PROCESS Apr 23, 2007 Abandoned
Array ( [id] => 102458 [patent_doc_number] => 07723207 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-25 [patent_title] => 'Three dimensional integrated circuit and method of design' [patent_app_type] => utility [patent_app_number] => 11/737598 [patent_app_country] => US [patent_app_date] => 2007-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3557 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/723/07723207.pdf [firstpage_image] =>[orig_patent_app_number] => 11737598 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/737598
Three dimensional integrated circuit and method of design Apr 18, 2007 Issued
Array ( [id] => 4539299 [patent_doc_number] => 07875531 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-25 [patent_title] => 'Method for the production of thin substrates' [patent_app_type] => utility [patent_app_number] => 11/736929 [patent_app_country] => US [patent_app_date] => 2007-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 12983 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/875/07875531.pdf [firstpage_image] =>[orig_patent_app_number] => 11736929 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/736929
Method for the production of thin substrates Apr 17, 2007 Issued
Array ( [id] => 9112973 [patent_doc_number] => 08569142 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-29 [patent_title] => 'Multi-level thin film capacitor on a ceramic substrate and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/736408 [patent_app_country] => US [patent_app_date] => 2007-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4138 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11736408 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/736408
Multi-level thin film capacitor on a ceramic substrate and method of manufacturing the same Apr 16, 2007 Issued
Array ( [id] => 10876185 [patent_doc_number] => 08900970 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-02 [patent_title] => 'Method for manufacturing a semiconductor device using a flexible substrate' [patent_app_type] => utility [patent_app_number] => 11/735009 [patent_app_country] => US [patent_app_date] => 2007-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 46 [patent_no_of_words] => 15183 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11735009 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/735009
Method for manufacturing a semiconductor device using a flexible substrate Apr 12, 2007 Issued
Array ( [id] => 8018127 [patent_doc_number] => 08138568 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-20 [patent_title] => 'Transparent carbon nanotube electrode using conductive dispersant and production method thereof' [patent_app_type] => utility [patent_app_number] => 11/735178 [patent_app_country] => US [patent_app_date] => 2007-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 5563 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/138/08138568.pdf [firstpage_image] =>[orig_patent_app_number] => 11735178 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/735178
Transparent carbon nanotube electrode using conductive dispersant and production method thereof Apr 12, 2007 Issued
Array ( [id] => 111688 [patent_doc_number] => 07718513 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-18 [patent_title] => 'Forming silicided gate and contacts from polysilicon germanium and structure formed' [patent_app_type] => utility [patent_app_number] => 11/734888 [patent_app_country] => US [patent_app_date] => 2007-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1904 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/718/07718513.pdf [firstpage_image] =>[orig_patent_app_number] => 11734888 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/734888
Forming silicided gate and contacts from polysilicon germanium and structure formed Apr 12, 2007 Issued
Array ( [id] => 4660893 [patent_doc_number] => 20080251800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-16 [patent_title] => 'Undoped and Unintentionally Doped Buffer Structures' [patent_app_type] => utility [patent_app_number] => 11/734218 [patent_app_country] => US [patent_app_date] => 2007-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5790 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0251/20080251800.pdf [firstpage_image] =>[orig_patent_app_number] => 11734218 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/734218
Light emitting diode having undoped and unintentionally doped nitride transition layer Apr 10, 2007 Issued
Array ( [id] => 4506766 [patent_doc_number] => 07915089 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-29 [patent_title] => 'Encapsulation method' [patent_app_type] => utility [patent_app_number] => 11/733289 [patent_app_country] => US [patent_app_date] => 2007-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 2780 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/915/07915089.pdf [firstpage_image] =>[orig_patent_app_number] => 11733289 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/733289
Encapsulation method Apr 9, 2007 Issued
Array ( [id] => 5069631 [patent_doc_number] => 20070190733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-16 [patent_title] => 'Transistors of Semiconductor Devices and Methods of Fabricating the Same' [patent_app_type] => utility [patent_app_number] => 11/733430 [patent_app_country] => US [patent_app_date] => 2007-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1761 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20070190733.pdf [firstpage_image] =>[orig_patent_app_number] => 11733430 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/733430
Transistors of Semiconductor Devices and Methods of Fabricating the Same Apr 9, 2007 Abandoned
Array ( [id] => 5210489 [patent_doc_number] => 20070249073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-25 [patent_title] => 'Method for determining the electrically active dopant density profile in ultra-shallow junction (USJ) structures' [patent_app_type] => utility [patent_app_number] => 11/732048 [patent_app_country] => US [patent_app_date] => 2007-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3726 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0249/20070249073.pdf [firstpage_image] =>[orig_patent_app_number] => 11732048 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/732048
Method for determining the electrically active dopant density profile in ultra-shallow junction (USJ) structures Apr 1, 2007 Abandoned
Array ( [id] => 4817064 [patent_doc_number] => 20080224323 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-18 [patent_title] => 'Semiconductor Module With Semiconductor Chips And Method For Producing It' [patent_app_type] => utility [patent_app_number] => 11/693333 [patent_app_country] => US [patent_app_date] => 2007-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6846 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20080224323.pdf [firstpage_image] =>[orig_patent_app_number] => 11693333 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/693333
Semiconductor module with multiple semiconductor chips Mar 28, 2007 Issued
Array ( [id] => 4715345 [patent_doc_number] => 20080237867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'LOW CONTACT RESISTANCE METAL CONTACT' [patent_app_type] => utility [patent_app_number] => 11/692227 [patent_app_country] => US [patent_app_date] => 2007-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3415 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20080237867.pdf [firstpage_image] =>[orig_patent_app_number] => 11692227 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/692227
Low contact resistance metal contact Mar 27, 2007 Issued
Array ( [id] => 91952 [patent_doc_number] => 07732285 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-08 [patent_title] => 'Semiconductor device having self-aligned epitaxial source and drain extensions' [patent_app_type] => utility [patent_app_number] => 11/729189 [patent_app_country] => US [patent_app_date] => 2007-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 6694 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/732/07732285.pdf [firstpage_image] =>[orig_patent_app_number] => 11729189 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/729189
Semiconductor device having self-aligned epitaxial source and drain extensions Mar 27, 2007 Issued
Array ( [id] => 5367958 [patent_doc_number] => 20090305517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-10 [patent_title] => 'Method of Manufacturing Semiconductor Device and Substrate Processing Apparatus' [patent_app_type] => utility [patent_app_number] => 12/224879 [patent_app_country] => US [patent_app_date] => 2007-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 21069 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0305/20090305517.pdf [firstpage_image] =>[orig_patent_app_number] => 12224879 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/224879
Method of manufacturing semiconductor device including removal of deposits from process chamber and supply portion Mar 26, 2007 Issued
Array ( [id] => 5063133 [patent_doc_number] => 20070224773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-27 [patent_title] => 'Method of producing simox wafer' [patent_app_type] => utility [patent_app_number] => 11/729229 [patent_app_country] => US [patent_app_date] => 2007-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2985 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20070224773.pdf [firstpage_image] =>[orig_patent_app_number] => 11729229 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/729229
Method of producing simox wafer Mar 26, 2007 Abandoned
Array ( [id] => 6456981 [patent_doc_number] => 20100090204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-15 [patent_title] => 'ORGANIC SEMICONDUCTOR ELEMENT AND MANUFACTURE METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/450315 [patent_app_country] => US [patent_app_date] => 2007-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7424 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20100090204.pdf [firstpage_image] =>[orig_patent_app_number] => 12450315 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/450315
ORGANIC SEMICONDUCTOR ELEMENT AND MANUFACTURE METHOD THEREOF Mar 25, 2007 Abandoned
Array ( [id] => 4737181 [patent_doc_number] => 20080230833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-25 [patent_title] => 'SEMICONDUCTOR COMPONENT AND METHOD FOR PRODUCING A SEMICONDUCTOR COMPONENT' [patent_app_type] => utility [patent_app_number] => 11/690494 [patent_app_country] => US [patent_app_date] => 2007-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10969 [patent_no_of_claims] => 55 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20080230833.pdf [firstpage_image] =>[orig_patent_app_number] => 11690494 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/690494
Method for producing a semiconductor component Mar 22, 2007 Issued
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