Search

Caleen O. Sullivan

Examiner (ID: 789, Phone: (571)272-6569 , Office: P/2896 )

Most Active Art Unit
2899
Art Unit(s)
2896, 1795, 1722, 2899, 1756
Total Applications
1358
Issued Applications
1151
Pending Applications
77
Abandoned Applications
165

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19444532 [patent_doc_number] => 12094823 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-17 [patent_title] => Interconnection structure and methods of forming the same [patent_app_type] => utility [patent_app_number] => 17/314294 [patent_app_country] => US [patent_app_date] => 2021-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5855 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17314294 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/314294
Interconnection structure and methods of forming the same May 6, 2021 Issued
Array ( [id] => 17262631 [patent_doc_number] => 20210375616 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => EUV PATTERNING METHODS, STRUCTURES, AND MATERIALS [patent_app_type] => utility [patent_app_number] => 17/308813 [patent_app_country] => US [patent_app_date] => 2021-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20129 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17308813 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/308813
EUV patterning methods, structures, and materials May 4, 2021 Issued
Array ( [id] => 18431714 [patent_doc_number] => 11676944 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-13 [patent_title] => Method for interconnecting stacked semiconductor devices [patent_app_type] => utility [patent_app_number] => 17/246982 [patent_app_country] => US [patent_app_date] => 2021-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 11486 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17246982 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/246982
Method for interconnecting stacked semiconductor devices May 2, 2021 Issued
Array ( [id] => 18407230 [patent_doc_number] => 20230168582 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-01 [patent_title] => COMPOSITION FOR FORMING RESIST UNDERLYING FILM [patent_app_type] => utility [patent_app_number] => 17/922553 [patent_app_country] => US [patent_app_date] => 2021-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27291 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 320 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17922553 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/922553
COMPOSITION FOR FORMING RESIST UNDERLYING FILM Apr 29, 2021 Pending
Array ( [id] => 18800574 [patent_doc_number] => 11833720 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-05 [patent_title] => Imprint method, imprint apparatus, and article manufacturing method [patent_app_type] => utility [patent_app_number] => 17/239795 [patent_app_country] => US [patent_app_date] => 2021-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 7444 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17239795 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/239795
Imprint method, imprint apparatus, and article manufacturing method Apr 25, 2021 Issued
Array ( [id] => 17993153 [patent_doc_number] => 20220359190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/238458 [patent_app_country] => US [patent_app_date] => 2021-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13810 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17238458 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/238458
Method of manufacturing a semiconductor device Apr 22, 2021 Issued
Array ( [id] => 20403275 [patent_doc_number] => 12493248 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-09 [patent_title] => Method for optimizing a sampling scheme and associated apparatuses [patent_app_type] => utility [patent_app_number] => 17/922925 [patent_app_country] => US [patent_app_date] => 2021-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1317 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17922925 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/922925
Method for optimizing a sampling scheme and associated apparatuses Apr 19, 2021 Issued
Array ( [id] => 18498903 [patent_doc_number] => 20230221632 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => EXPOSURE PATTERN, EXPOSURE MASK USED FOR FORMING SAME, AND METHOD FOR FORMING EXPOSURE PATTERN USING SAME [patent_app_type] => utility [patent_app_number] => 17/927229 [patent_app_country] => US [patent_app_date] => 2021-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5991 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17927229 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/927229
EXPOSURE PATTERN, EXPOSURE MASK USED FOR FORMING SAME, AND METHOD FOR FORMING EXPOSURE PATTERN USING SAME Apr 5, 2021 Abandoned
Array ( [id] => 19487246 [patent_doc_number] => 12106970 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-01 [patent_title] => Pattern sheet, semiconductor intermediate product, and hole etching method [patent_app_type] => utility [patent_app_number] => 17/919520 [patent_app_country] => US [patent_app_date] => 2021-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 8953 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17919520 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/919520
Pattern sheet, semiconductor intermediate product, and hole etching method Apr 1, 2021 Issued
Array ( [id] => 18359776 [patent_doc_number] => 20230141367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => METHOD FOR DEPOSITING NANOSTRUCTURES ON SUBSTRATE AND NANOSTRUCTURE ARRAYS [patent_app_type] => utility [patent_app_number] => 17/916052 [patent_app_country] => US [patent_app_date] => 2021-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13868 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17916052 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/916052
Method for depositing nanostructures on substrate and nanostructure arrays Mar 29, 2021 Issued
Array ( [id] => 18339304 [patent_doc_number] => 20230131253 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-27 [patent_title] => RESIST UNDERLAYER FILM-FORMING COMPOSITION WITH SUPPRESSED DEGENERATION OF CROSSLINKING AGENT [patent_app_type] => utility [patent_app_number] => 17/911844 [patent_app_country] => US [patent_app_date] => 2021-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10064 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17911844 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/911844
RESIST UNDERLAYER FILM-FORMING COMPOSITION WITH SUPPRESSED DEGENERATION OF CROSSLINKING AGENT Mar 29, 2021 Pending
Array ( [id] => 18657794 [patent_doc_number] => 20230303750 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => PHOTOSENSITIVE RESIN COMPOSITION, PHOTOSENSITIVE RESIN FILM, MULTILAYERED PRINTED WIRING BOARD, SEMICONDUCTOR PACKAGE, AND METHOD FOR PRODUCING MULTILAYERED PRINTED WIRING BOARD [patent_app_type] => utility [patent_app_number] => 18/019024 [patent_app_country] => US [patent_app_date] => 2021-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22701 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18019024 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/019024
PHOTOSENSITIVE RESIN COMPOSITION, PHOTOSENSITIVE RESIN FILM, MULTILAYERED PRINTED WIRING BOARD, SEMICONDUCTOR PACKAGE, AND METHOD FOR PRODUCING MULTILAYERED PRINTED WIRING BOARD Mar 24, 2021 Pending
Array ( [id] => 18375110 [patent_doc_number] => 20230150190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => METHOD AND APPARATUS FOR LITHOGRAPHY-BASED GENERATIVE MANUFACTURING OF A THREE-DIMENSIONAL COMPONENT [patent_app_type] => utility [patent_app_number] => 17/913389 [patent_app_country] => US [patent_app_date] => 2021-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4501 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17913389 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/913389
METHOD AND APPARATUS FOR LITHOGRAPHY-BASED GENERATIVE MANUFACTURING OF A THREE-DIMENSIONAL COMPONENT Mar 17, 2021 Pending
Array ( [id] => 16951917 [patent_doc_number] => 20210210609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-08 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/202994 [patent_app_country] => US [patent_app_date] => 2021-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6242 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17202994 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/202994
Method of manufacturing semiconductor device Mar 15, 2021 Issued
Array ( [id] => 18047968 [patent_doc_number] => 11521926 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => Semiconductor device structure with serpentine conductive feature and method for forming the same [patent_app_type] => utility [patent_app_number] => 17/197770 [patent_app_country] => US [patent_app_date] => 2021-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 6109 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17197770 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/197770
Semiconductor device structure with serpentine conductive feature and method for forming the same Mar 9, 2021 Issued
Array ( [id] => 17100148 [patent_doc_number] => 20210287939 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => Metal Deposition Processes [patent_app_type] => utility [patent_app_number] => 17/195737 [patent_app_country] => US [patent_app_date] => 2021-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13045 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17195737 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/195737
Metal Deposition Processes Mar 8, 2021 Abandoned
Array ( [id] => 16920589 [patent_doc_number] => 20210193681 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => VERTICAL MEMORY DEVICE AND METHOD OF FABRICATION THE SAME [patent_app_type] => utility [patent_app_number] => 17/196005 [patent_app_country] => US [patent_app_date] => 2021-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13130 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17196005 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/196005
Vertical memory device and method of fabrication the same Mar 8, 2021 Issued
Array ( [id] => 16904738 [patent_doc_number] => 20210183654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-17 [patent_title] => Method and Structure of Cut End with Self-Aligned Double Patterning [patent_app_type] => utility [patent_app_number] => 17/189130 [patent_app_country] => US [patent_app_date] => 2021-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6968 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17189130 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/189130
Method and structure of cut end with self-aligned double patterning Feb 28, 2021 Issued
Array ( [id] => 18562957 [patent_doc_number] => 11728210 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-15 [patent_title] => Manufacturing method of original plate and semiconductor device [patent_app_type] => utility [patent_app_number] => 17/187696 [patent_app_country] => US [patent_app_date] => 2021-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 56 [patent_no_of_words] => 8297 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17187696 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/187696
Manufacturing method of original plate and semiconductor device Feb 25, 2021 Issued
Array ( [id] => 16904962 [patent_doc_number] => 20210183878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-17 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICE WITH SOURCE STRUCTURE AND METHODS FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/185963 [patent_app_country] => US [patent_app_date] => 2021-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12521 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17185963 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/185963
Three-dimensional memory device with source structure and methods for forming the same Feb 25, 2021 Issued
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