Search

Caleen O. Sullivan

Examiner (ID: 789, Phone: (571)272-6569 , Office: P/2896 )

Most Active Art Unit
2899
Art Unit(s)
2896, 1795, 1722, 2899, 1756
Total Applications
1358
Issued Applications
1151
Pending Applications
77
Abandoned Applications
165

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17529834 [patent_doc_number] => 11302532 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-12 [patent_title] => Self-aligned double patterning with spacer-merge region [patent_app_type] => utility [patent_app_number] => 16/806261 [patent_app_country] => US [patent_app_date] => 2020-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 7267 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16806261 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/806261
Self-aligned double patterning with spacer-merge region Mar 1, 2020 Issued
Array ( [id] => 17969670 [patent_doc_number] => 11487199 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Secondary electron generating composition [patent_app_type] => utility [patent_app_number] => 16/803871 [patent_app_country] => US [patent_app_date] => 2020-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 27 [patent_no_of_words] => 33854 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16803871 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/803871
Secondary electron generating composition Feb 26, 2020 Issued
Array ( [id] => 16081157 [patent_doc_number] => 20200194565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/803130 [patent_app_country] => US [patent_app_date] => 2020-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9485 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16803130 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/803130
Semiconductor devices Feb 26, 2020 Issued
Array ( [id] => 17605496 [patent_doc_number] => 11333979 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => Methods of forming a pattern and methods of fabricating a semiconductor device [patent_app_type] => utility [patent_app_number] => 16/801613 [patent_app_country] => US [patent_app_date] => 2020-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 6243 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16801613 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/801613
Methods of forming a pattern and methods of fabricating a semiconductor device Feb 25, 2020 Issued
Array ( [id] => 16594084 [patent_doc_number] => 10903361 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-26 [patent_title] => Fabrication of a vertical field effect transistor device with a modified vertical fin geometry [patent_app_type] => utility [patent_app_number] => 16/792977 [patent_app_country] => US [patent_app_date] => 2020-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 26 [patent_no_of_words] => 12384 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16792977 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/792977
Fabrication of a vertical field effect transistor device with a modified vertical fin geometry Feb 17, 2020 Issued
Array ( [id] => 16638185 [patent_doc_number] => 10916703 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => Masks, method to inspect and adjust mask position, and method to pattern pixels of organic light-emitting display device utilizing the masks [patent_app_type] => utility [patent_app_number] => 16/792581 [patent_app_country] => US [patent_app_date] => 2020-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 6593 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16792581 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/792581
Masks, method to inspect and adjust mask position, and method to pattern pixels of organic light-emitting display device utilizing the masks Feb 16, 2020 Issued
Array ( [id] => 16479561 [patent_doc_number] => 10854515 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-01 [patent_title] => Methods, apparatus, and system for protecting cobalt formations from oxidation during semiconductor device formation [patent_app_type] => utility [patent_app_number] => 16/778884 [patent_app_country] => US [patent_app_date] => 2020-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 5043 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16778884 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/778884
Methods, apparatus, and system for protecting cobalt formations from oxidation during semiconductor device formation Jan 30, 2020 Issued
Array ( [id] => 16981523 [patent_doc_number] => 20210225760 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => FULLY-ALIGNED SKIP-VIAS [patent_app_type] => utility [patent_app_number] => 16/748951 [patent_app_country] => US [patent_app_date] => 2020-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7492 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16748951 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/748951
Fully-aligned skip-vias Jan 21, 2020 Issued
Array ( [id] => 16981524 [patent_doc_number] => 20210225761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => CONDUCTIVE LINES WITH SUBTRACTIVE CUTS [patent_app_type] => utility [patent_app_number] => 16/749476 [patent_app_country] => US [patent_app_date] => 2020-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4184 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16749476 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/749476
Conductive lines with subtractive cuts Jan 21, 2020 Issued
Array ( [id] => 16981469 [patent_doc_number] => 20210225706 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => Self Aligned Contact Scheme [patent_app_type] => utility [patent_app_number] => 16/746544 [patent_app_country] => US [patent_app_date] => 2020-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9462 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16746544 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/746544
Self aligned contact scheme Jan 16, 2020 Issued
Array ( [id] => 17166141 [patent_doc_number] => 11152253 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-19 [patent_title] => Semiconductor structure and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 16/739126 [patent_app_country] => US [patent_app_date] => 2020-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 7614 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16739126 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/739126
Semiconductor structure and method for fabricating the same Jan 9, 2020 Issued
Array ( [id] => 16233916 [patent_doc_number] => 10741479 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-11 [patent_title] => Co-packaged die on leadframe with common contact [patent_app_type] => utility [patent_app_number] => 16/734193 [patent_app_country] => US [patent_app_date] => 2020-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 19 [patent_no_of_words] => 8699 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16734193 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/734193
Co-packaged die on leadframe with common contact Jan 2, 2020 Issued
Array ( [id] => 17729157 [patent_doc_number] => 11385544 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-12 [patent_title] => Composition for forming silicon-containing resist underlayer film and patterning process [patent_app_type] => utility [patent_app_number] => 16/733882 [patent_app_country] => US [patent_app_date] => 2020-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17902 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16733882 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/733882
Composition for forming silicon-containing resist underlayer film and patterning process Jan 2, 2020 Issued
Array ( [id] => 16934205 [patent_doc_number] => 20210200094 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => METHODS AND APPARATUS FOR DIGITAL MATERIAL DEPOSITION ONTO SEMICONDUCTOR WAFERS [patent_app_type] => utility [patent_app_number] => 16/729919 [patent_app_country] => US [patent_app_date] => 2019-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12289 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 323 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16729919 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/729919
Methods and apparatus for digital material deposition onto semiconductor wafers Dec 29, 2019 Issued
Array ( [id] => 17786079 [patent_doc_number] => 11409198 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-09 [patent_title] => Hardmask composition, hardmask layer and method of forming patterns [patent_app_type] => utility [patent_app_number] => 16/725191 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5893 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16725191 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/725191
Hardmask composition, hardmask layer and method of forming patterns Dec 22, 2019 Issued
Array ( [id] => 17786078 [patent_doc_number] => 11409197 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-09 [patent_title] => Hardmask composition, hardmask layer and method of forming patterns [patent_app_type] => utility [patent_app_number] => 16/722720 [patent_app_country] => US [patent_app_date] => 2019-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8366 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16722720 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/722720
Hardmask composition, hardmask layer and method of forming patterns Dec 19, 2019 Issued
Array ( [id] => 15775855 [patent_doc_number] => 20200118945 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-16 [patent_title] => SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/714793 [patent_app_country] => US [patent_app_date] => 2019-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6876 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16714793 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/714793
Semiconductor package and manufacturing method thereof Dec 15, 2019 Issued
Array ( [id] => 17371764 [patent_doc_number] => 20220026816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => LITHOGRAPHIC PATTERNING METHOD [patent_app_type] => utility [patent_app_number] => 17/312075 [patent_app_country] => US [patent_app_date] => 2019-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5628 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17312075 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/312075
Lithographic patterning method Dec 11, 2019 Issued
Array ( [id] => 16478667 [patent_doc_number] => 10853616 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-01 [patent_title] => Fingerprint sensor device and method [patent_app_type] => utility [patent_app_number] => 16/710478 [patent_app_country] => US [patent_app_date] => 2019-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 10926 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16710478 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/710478
Fingerprint sensor device and method Dec 10, 2019 Issued
Array ( [id] => 17210716 [patent_doc_number] => 11171093 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Semiconductor structure and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 16/703112 [patent_app_country] => US [patent_app_date] => 2019-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 4697 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16703112 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/703112
Semiconductor structure and fabrication method thereof Dec 3, 2019 Issued
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