
Caleen O. Sullivan
Examiner (ID: 789, Phone: (571)272-6569 , Office: P/2896 )
| Most Active Art Unit | 2899 |
| Art Unit(s) | 2896, 1795, 1722, 2899, 1756 |
| Total Applications | 1358 |
| Issued Applications | 1151 |
| Pending Applications | 77 |
| Abandoned Applications | 165 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 16067807
[patent_doc_number] => 10692868
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-06-23
[patent_title] => Contact formation through low-temperature epitaxial deposition in semiconductor devices
[patent_app_type] => utility
[patent_app_number] => 16/227215
[patent_app_country] => US
[patent_app_date] => 2018-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 10954
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16227215
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/227215 | Contact formation through low-temperature epitaxial deposition in semiconductor devices | Dec 19, 2018 | Issued |
Array
(
[id] => 17394454
[patent_doc_number] => 11243465
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-02-08
[patent_title] => Plasma treatment method to enhance surface adhesion for lithography
[patent_app_type] => utility
[patent_app_number] => 16/221030
[patent_app_country] => US
[patent_app_date] => 2018-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 25
[patent_no_of_words] => 4073
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16221030
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/221030 | Plasma treatment method to enhance surface adhesion for lithography | Dec 13, 2018 | Issued |
Array
(
[id] => 15388895
[patent_doc_number] => 10535646
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-01-14
[patent_title] => Systems and methods for a sequential spacer scheme
[patent_app_type] => utility
[patent_app_number] => 16/220174
[patent_app_country] => US
[patent_app_date] => 2018-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 34
[patent_no_of_words] => 4808
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16220174
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/220174 | Systems and methods for a sequential spacer scheme | Dec 13, 2018 | Issued |
Array
(
[id] => 14284987
[patent_doc_number] => 20190139778
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-09
[patent_title] => INTEGRATING ATOMIC SCALE PROCESSES: ALD (ATOMIC LAYER DEPOSITION) AND ALE (ATOMIC LAYER ETCH)
[patent_app_type] => utility
[patent_app_number] => 16/220583
[patent_app_country] => US
[patent_app_date] => 2018-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10096
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16220583
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/220583 | Integrating atomic scale processes: ALD (atomic layer deposition) and ALE (atomic layer etch) | Dec 13, 2018 | Issued |
Array
(
[id] => 14510117
[patent_doc_number] => 20190198713
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-06-27
[patent_title] => INFRARED LIGHT EMITTING DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/218810
[patent_app_country] => US
[patent_app_date] => 2018-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11224
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16218810
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/218810 | Infrared light emitting device | Dec 12, 2018 | Issued |
Array
(
[id] => 15760771
[patent_doc_number] => 10622518
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2020-04-14
[patent_title] => Light-emitting diode with a mesa constructed from a unit cell
[patent_app_type] => utility
[patent_app_number] => 16/218381
[patent_app_country] => US
[patent_app_date] => 2018-12-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 36
[patent_no_of_words] => 7540
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16218381
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/218381 | Light-emitting diode with a mesa constructed from a unit cell | Dec 11, 2018 | Issued |
Array
(
[id] => 14163883
[patent_doc_number] => 20190109044
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-04-11
[patent_title] => Composite Contact Plug Structure and Method of Making Same
[patent_app_type] => utility
[patent_app_number] => 16/216585
[patent_app_country] => US
[patent_app_date] => 2018-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4860
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16216585
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/216585 | Composite contact plug structure and method of making same | Dec 10, 2018 | Issued |
Array
(
[id] => 14079609
[patent_doc_number] => 20190088692
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-03-21
[patent_title] => IMAGE SENSOR HAVING CONDUCTIVE LAYER AND PROTECTIVE LAYER
[patent_app_type] => utility
[patent_app_number] => 16/194778
[patent_app_country] => US
[patent_app_date] => 2018-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6534
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16194778
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/194778 | Image sensor having conductive layer and protective layer | Nov 18, 2018 | Issued |
Array
(
[id] => 14367169
[patent_doc_number] => 10304898
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-05-28
[patent_title] => Absorption enhancement structure for image sensor
[patent_app_type] => utility
[patent_app_number] => 16/190608
[patent_app_country] => US
[patent_app_date] => 2018-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 32
[patent_no_of_words] => 9359
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16190608
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/190608 | Absorption enhancement structure for image sensor | Nov 13, 2018 | Issued |
Array
(
[id] => 16918177
[patent_doc_number] => 20210191269
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-24
[patent_title] => SEMICONDUCTOR ELEMENT INTERMEDIATE, COMPOSITION FOR FORMING METAL-CONTAINING FILM, METHOD OF PRODUCING SEMICONDUCTOR ELEMENT INTERMEDIATE, AND METHOD OF PRODUCING SEMICONDUCTOR ELEMENT
[patent_app_type] => utility
[patent_app_number] => 16/757830
[patent_app_country] => US
[patent_app_date] => 2018-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 26037
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16757830
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/757830 | Semiconductor element intermediate, composition for forming metal-containing film, method of producing semiconductor element intermediate, and method of producing semiconductor element | Nov 12, 2018 | Issued |
Array
(
[id] => 15673285
[patent_doc_number] => 10600886
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-03-24
[patent_title] => Vertical field effect transistors with bottom source/drain epitaxy
[patent_app_type] => utility
[patent_app_number] => 16/179009
[patent_app_country] => US
[patent_app_date] => 2018-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 4544
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16179009
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/179009 | Vertical field effect transistors with bottom source/drain epitaxy | Nov 1, 2018 | Issued |
Array
(
[id] => 14688259
[patent_doc_number] => 20190243245
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-08-08
[patent_title] => FILM RESIST AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/179150
[patent_app_country] => US
[patent_app_date] => 2018-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5646
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 37
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16179150
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/179150 | Film resist and method of manufacturing semiconductor device | Nov 1, 2018 | Issued |
Array
(
[id] => 16902720
[patent_doc_number] => 20210181636
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-17
[patent_title] => ALLYLOXY DERIVATIVE, RESIST UNDERLAYER FORMING COMPOSITION USING THE SAME, AND METHOD OF MANUFACTURING RESIST UNDERLAYER AND SEMICONDUCTOR DEVICE USING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/760908
[patent_app_country] => US
[patent_app_date] => 2018-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13707
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16760908
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/760908 | Allyloxy derivative, resist underlayer forming composition using the same, and method of manufacturing resist underlayer and semiconductor device using the same | Oct 29, 2018 | Issued |
Array
(
[id] => 15657279
[patent_doc_number] => 20200091170
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-03-19
[patent_title] => VERTICAL MEMORY DEVICE AND METHOD OF FABRICATION THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/174187
[patent_app_country] => US
[patent_app_date] => 2018-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13115
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16174187
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/174187 | Vertical memory device and method of fabrication the same | Oct 28, 2018 | Issued |
Array
(
[id] => 15841505
[patent_doc_number] => 20200136035
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-30
[patent_title] => RESISTIVE RANDOM-ACCESS MEMORY
[patent_app_type] => utility
[patent_app_number] => 16/170888
[patent_app_country] => US
[patent_app_date] => 2018-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11014
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16170888
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/170888 | Resistive random-access memory | Oct 24, 2018 | Issued |
Array
(
[id] => 16324305
[patent_doc_number] => 10784278
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-09-22
[patent_title] => Memory device and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 16/171353
[patent_app_country] => US
[patent_app_date] => 2018-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 6230
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16171353
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/171353 | Memory device and manufacturing method thereof | Oct 24, 2018 | Issued |
Array
(
[id] => 15733699
[patent_doc_number] => 10615288
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2020-04-07
[patent_title] => Integration scheme for non-volatile memory on gate-all-around structure
[patent_app_type] => utility
[patent_app_number] => 16/169207
[patent_app_country] => US
[patent_app_date] => 2018-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 43
[patent_no_of_words] => 6159
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16169207
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/169207 | Integration scheme for non-volatile memory on gate-all-around structure | Oct 23, 2018 | Issued |
Array
(
[id] => 14285397
[patent_doc_number] => 20190139983
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-09
[patent_title] => THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/168219
[patent_app_country] => US
[patent_app_date] => 2018-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11036
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16168219
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/168219 | Three-dimensional semiconductor memory device | Oct 22, 2018 | Issued |
Array
(
[id] => 16286134
[patent_doc_number] => 20200279736
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-09-03
[patent_title] => METHODF FOR FORMING MASK PATTERN, STORAGE MEDIUM, AND APPARATUS FOR PROCESSING SUBSTRATE
[patent_app_type] => utility
[patent_app_number] => 16/759532
[patent_app_country] => US
[patent_app_date] => 2018-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7257
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16759532
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/759532 | Method for forming mask pattern, storage medium, and apparatus for processing substrate | Oct 21, 2018 | Issued |
Array
(
[id] => 13936441
[patent_doc_number] => 20190051736
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-02-14
[patent_title] => VERTICAL FIELD EFFECT TRANSISTORS WITH UNIFORM THRESHOLD VOLTAGE
[patent_app_type] => utility
[patent_app_number] => 16/161484
[patent_app_country] => US
[patent_app_date] => 2018-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5615
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16161484
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/161484 | Vertical field effect transistors with uniform threshold voltage | Oct 15, 2018 | Issued |