
Caleen O. Sullivan
Examiner (ID: 789, Phone: (571)272-6569 , Office: P/2896 )
| Most Active Art Unit | 2899 |
| Art Unit(s) | 2896, 1795, 1722, 2899, 1756 |
| Total Applications | 1358 |
| Issued Applications | 1151 |
| Pending Applications | 77 |
| Abandoned Applications | 165 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 14738335
[patent_doc_number] => 10388577
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-08-20
[patent_title] => Nanosheet devices with different types of work function metals
[patent_app_type] => utility
[patent_app_number] => 15/938522
[patent_app_country] => US
[patent_app_date] => 2018-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 24
[patent_no_of_words] => 7269
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15938522
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/938522 | Nanosheet devices with different types of work function metals | Mar 27, 2018 | Issued |
Array
(
[id] => 13936207
[patent_doc_number] => 20190051619
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-02-14
[patent_title] => FAN-OUT SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 15/938596
[patent_app_country] => US
[patent_app_date] => 2018-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10266
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 212
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15938596
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/938596 | Fan-out semiconductor package | Mar 27, 2018 | Issued |
Array
(
[id] => 15015391
[patent_doc_number] => 10453856
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-10-22
[patent_title] => Low resistance vertical channel 3D memory
[patent_app_type] => utility
[patent_app_number] => 15/938695
[patent_app_country] => US
[patent_app_date] => 2018-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 10269
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15938695
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/938695 | Low resistance vertical channel 3D memory | Mar 27, 2018 | Issued |
Array
(
[id] => 14738673
[patent_doc_number] => 10388747
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-08-20
[patent_title] => Gate contact structure positioned above an active region with air gaps positioned adjacent the gate structure
[patent_app_type] => utility
[patent_app_number] => 15/938510
[patent_app_country] => US
[patent_app_date] => 2018-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 6818
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15938510
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/938510 | Gate contact structure positioned above an active region with air gaps positioned adjacent the gate structure | Mar 27, 2018 | Issued |
Array
(
[id] => 16993623
[patent_doc_number] => 20210232043
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-29
[patent_title] => Mask Plate, Manufacturing Method of Patterned Film Layer and Manufacturing Method of Thin Film Transistor
[patent_app_type] => utility
[patent_app_number] => 16/098045
[patent_app_country] => US
[patent_app_date] => 2018-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6403
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16098045
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/098045 | Mask plate, manufacturing method of patterned film layer and manufacturing method of thin film transistor | Mar 21, 2018 | Issued |
Array
(
[id] => 13303653
[patent_doc_number] => 20180203363
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-07-19
[patent_title] => CONTROLLER FOR OPTICAL DEVICE, EXPOSURE METHOD AND APPARATUS, AND METHOD FOR MANUFACTURING DEVICE
[patent_app_type] => utility
[patent_app_number] => 15/920834
[patent_app_country] => US
[patent_app_date] => 2018-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11737
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15920834
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/920834 | Controller for optical device, exposure method and apparatus, and method for manufacturing device | Mar 13, 2018 | Issued |
Array
(
[id] => 16529031
[patent_doc_number] => 20200403112
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-24
[patent_title] => APPARATUS AND METHOD FOR MANUFACTURING A SOLAR CELL ARRANGEMENT
[patent_app_type] => utility
[patent_app_number] => 16/979122
[patent_app_country] => US
[patent_app_date] => 2018-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10952
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16979122
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/979122 | Apparatus and method for manufacturing a solar cell arrangement | Mar 7, 2018 | Issued |
Array
(
[id] => 13571423
[patent_doc_number] => 20180337259
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-11-22
[patent_title] => VERTICAL FIELD EFFECT TRANSISTORS WITH UNIFORM THRESHOLD VOLTAGE
[patent_app_type] => utility
[patent_app_number] => 15/910506
[patent_app_country] => US
[patent_app_date] => 2018-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5589
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15910506
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/910506 | Vertical field effect transistors with uniform threshold voltage | Mar 1, 2018 | Issued |
Array
(
[id] => 13378541
[patent_doc_number] => 20180240812
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-08-23
[patent_title] => 3D MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 15/899078
[patent_app_country] => US
[patent_app_date] => 2018-02-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4844
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15899078
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/899078 | 3D memory device | Feb 18, 2018 | Issued |
Array
(
[id] => 12823708
[patent_doc_number] => 20180166408
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-06-14
[patent_title] => Bond Structures and the Methods of Forming the Same
[patent_app_type] => utility
[patent_app_number] => 15/894324
[patent_app_country] => US
[patent_app_date] => 2018-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5213
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15894324
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/894324 | Bond structures and the methods of forming the same | Feb 11, 2018 | Issued |
Array
(
[id] => 16934201
[patent_doc_number] => 20210200090
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-01
[patent_title] => Patterning Method and Method for Manufacturing Array Substrate
[patent_app_type] => utility
[patent_app_number] => 16/086990
[patent_app_country] => US
[patent_app_date] => 2018-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6329
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16086990
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/086990 | Patterning method and method for manufacturing array substrate | Feb 11, 2018 | Issued |
Array
(
[id] => 14047839
[patent_doc_number] => 20190080026
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-03-14
[patent_title] => GUIDE LAYOUT CREATING APPARATUS, GUIDE LAYOUT CREATING METHOD AND RECORDING MEDIUM
[patent_app_type] => utility
[patent_app_number] => 15/891408
[patent_app_country] => US
[patent_app_date] => 2018-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3590
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15891408
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/891408 | Guide layout creating apparatus, guide layout creating method and recording medium | Feb 7, 2018 | Issued |
Array
(
[id] => 12823882
[patent_doc_number] => 20180166466
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-06-14
[patent_title] => PIXEL STRUCTURE AND FABRICATION METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 15/890665
[patent_app_country] => US
[patent_app_date] => 2018-02-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9647
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -5
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15890665
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/890665 | Pixel structure and fabrication method thereof | Feb 6, 2018 | Issued |
Array
(
[id] => 13667671
[patent_doc_number] => 10164017
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-12-25
[patent_title] => Method of forming a semiconductor device having impurity region
[patent_app_type] => utility
[patent_app_number] => 15/887773
[patent_app_country] => US
[patent_app_date] => 2018-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 23
[patent_no_of_words] => 6370
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15887773
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/887773 | Method of forming a semiconductor device having impurity region | Feb 1, 2018 | Issued |
Array
(
[id] => 14691533
[patent_doc_number] => 20190244882
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-08-08
[patent_title] => Formation of Fine Pitch Traces Using Ultra-Thin PAA Modified Fully Additive Process
[patent_app_type] => utility
[patent_app_number] => 15/887346
[patent_app_country] => US
[patent_app_date] => 2018-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6261
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -23
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15887346
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/887346 | Formation of fine pitch traces using ultra-thin PAA modified fully additive process | Feb 1, 2018 | Issued |
Array
(
[id] => 14734021
[patent_doc_number] => 10386406
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-08-20
[patent_title] => Back gate tuning circuits
[patent_app_type] => utility
[patent_app_number] => 15/887417
[patent_app_country] => US
[patent_app_date] => 2018-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6625
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15887417
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/887417 | Back gate tuning circuits | Feb 1, 2018 | Issued |
Array
(
[id] => 14676621
[patent_doc_number] => 20190237425
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-08-01
[patent_title] => POWER ELECTRONICS ASSEMBLIES WITH METAL INVERSE OPAL BONDING, ELECTRICAL CONTACT AND COOLING LAYERS, AND VEHICLES INCORPORATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 15/882216
[patent_app_country] => US
[patent_app_date] => 2018-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8019
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15882216
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/882216 | Power electronics assemblies with metal inverse opal bonding, electrical contact and cooling layers, and vehicles incorporating the same | Jan 28, 2018 | Issued |
Array
(
[id] => 15560627
[patent_doc_number] => 20200064725
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-02-27
[patent_title] => MASK BLANK, METHOD FOR MANUFACTURING TRANSFER MASK, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/488901
[patent_app_country] => US
[patent_app_date] => 2018-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 17762
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16488901
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/488901 | Mask blank, method for manufacturing transfer mask, and method for manufacturing semiconductor device | Jan 23, 2018 | Issued |
Array
(
[id] => 15703813
[patent_doc_number] => 10608094
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-03-31
[patent_title] => Semiconductor device and method of forming the same
[patent_app_type] => utility
[patent_app_number] => 15/877395
[patent_app_country] => US
[patent_app_date] => 2018-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 17
[patent_no_of_words] => 5921
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15877395
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/877395 | Semiconductor device and method of forming the same | Jan 22, 2018 | Issued |
Array
(
[id] => 14203501
[patent_doc_number] => 10268868
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-04-23
[patent_title] => Fingerprint sensor device and method
[patent_app_type] => utility
[patent_app_number] => 15/877978
[patent_app_country] => US
[patent_app_date] => 2018-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 12
[patent_no_of_words] => 10246
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15877978
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/877978 | Fingerprint sensor device and method | Jan 22, 2018 | Issued |