Search

Caleen O. Sullivan

Examiner (ID: 789, Phone: (571)272-6569 , Office: P/2896 )

Most Active Art Unit
2899
Art Unit(s)
2896, 1795, 1722, 2899, 1756
Total Applications
1358
Issued Applications
1151
Pending Applications
77
Abandoned Applications
165

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11861945 [patent_doc_number] => 09741633 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-22 [patent_title] => 'Semiconductor package including barrier members and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 15/171477 [patent_app_country] => US [patent_app_date] => 2016-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 8808 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15171477 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/171477
Semiconductor package including barrier members and method of manufacturing the same Jun 1, 2016 Issued
Array ( [id] => 11840185 [patent_doc_number] => 20170221905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-03 [patent_title] => 'SRAM CELL AND LOGIC CELL DESIGN' [patent_app_type] => utility [patent_app_number] => 15/170562 [patent_app_country] => US [patent_app_date] => 2016-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 8687 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15170562 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/170562
SRAM cell and logic cell design May 31, 2016 Issued
Array ( [id] => 11076149 [patent_doc_number] => 20160273113 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-22 [patent_title] => 'TWO-STEP DEPOSITION WITH IMPROVED SELECTIVITY' [patent_app_type] => utility [patent_app_number] => 15/165474 [patent_app_country] => US [patent_app_date] => 2016-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1703 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15165474 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/165474
TWO-STEP DEPOSITION WITH IMPROVED SELECTIVITY May 25, 2016 Abandoned
Array ( [id] => 11063671 [patent_doc_number] => 20160260633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-08 [patent_title] => 'Composite Contact Plug Structure and Method of Making Same' [patent_app_type] => utility [patent_app_number] => 15/156515 [patent_app_country] => US [patent_app_date] => 2016-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5556 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15156515 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/156515
Composite contact plug structure and method of making same May 16, 2016 Issued
Array ( [id] => 12935899 [patent_doc_number] => 09831191 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-28 [patent_title] => Electronic package, semiconductor substrate of the electronic package, and method for manufacturing the electronic package [patent_app_type] => utility [patent_app_number] => 15/149576 [patent_app_country] => US [patent_app_date] => 2016-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 4355 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15149576 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/149576
Electronic package, semiconductor substrate of the electronic package, and method for manufacturing the electronic package May 8, 2016 Issued
Array ( [id] => 12953950 [patent_doc_number] => 09837463 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-12-05 [patent_title] => Solid-state imaging device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 15/149767 [patent_app_country] => US [patent_app_date] => 2016-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 4669 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15149767 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/149767
Solid-state imaging device and method of manufacturing the same May 8, 2016 Issued
Array ( [id] => 12030624 [patent_doc_number] => 20170320723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-09 [patent_title] => 'SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/149669 [patent_app_country] => US [patent_app_date] => 2016-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6114 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15149669 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/149669
Semiconductor package and manufacturing method thereof May 8, 2016 Issued
Array ( [id] => 11831872 [patent_doc_number] => 09728622 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-08-08 [patent_title] => 'Dummy gate formation using spacer pull down hardmask' [patent_app_type] => utility [patent_app_number] => 15/149764 [patent_app_country] => US [patent_app_date] => 2016-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7126 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15149764 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/149764
Dummy gate formation using spacer pull down hardmask May 8, 2016 Issued
Array ( [id] => 12019867 [patent_doc_number] => 09812579 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-07 [patent_title] => 'Thin film transistor, method of fabricating the same, array substrate and display device' [patent_app_type] => utility [patent_app_number] => 15/149587 [patent_app_country] => US [patent_app_date] => 2016-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 7148 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15149587 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/149587
Thin film transistor, method of fabricating the same, array substrate and display device May 8, 2016 Issued
Array ( [id] => 11273995 [patent_doc_number] => 20160336542 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-17 [patent_title] => 'ENCAPSULATING FILM STACKS FOR OLED APPLICATIONS' [patent_app_type] => utility [patent_app_number] => 15/149785 [patent_app_country] => US [patent_app_date] => 2016-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10450 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15149785 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/149785
Encapsulating film stacks for OLED applications May 8, 2016 Issued
Array ( [id] => 11876561 [patent_doc_number] => 09748343 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-29 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 15/149569 [patent_app_country] => US [patent_app_date] => 2016-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 8589 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15149569 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/149569
Semiconductor device May 8, 2016 Issued
Array ( [id] => 11687514 [patent_doc_number] => 09685564 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-20 [patent_title] => 'Gate-all-around field effect transistors with horizontal nanosheet conductive channel structures for MOL/inter-channel spacing and related cell architectures' [patent_app_type] => utility [patent_app_number] => 15/149722 [patent_app_country] => US [patent_app_date] => 2016-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4704 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15149722 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/149722
Gate-all-around field effect transistors with horizontal nanosheet conductive channel structures for MOL/inter-channel spacing and related cell architectures May 8, 2016 Issued
Array ( [id] => 11740221 [patent_doc_number] => 09704814 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-11 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 15/149581 [patent_app_country] => US [patent_app_date] => 2016-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4257 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15149581 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/149581
Semiconductor device May 8, 2016 Issued
Array ( [id] => 11599861 [patent_doc_number] => 09647039 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-05-09 [patent_title] => 'Array substrate, display panel, display device, and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 15/149748 [patent_app_country] => US [patent_app_date] => 2016-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 6943 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15149748 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/149748
Array substrate, display panel, display device, and fabrication method thereof May 8, 2016 Issued
Array ( [id] => 12967477 [patent_doc_number] => 09875388 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-23 [patent_title] => Fingerprint sensor device and method [patent_app_type] => utility [patent_app_number] => 15/149903 [patent_app_country] => US [patent_app_date] => 2016-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 10219 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15149903 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/149903
Fingerprint sensor device and method May 8, 2016 Issued
Array ( [id] => 11118280 [patent_doc_number] => 20160315253 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-27 [patent_title] => 'NON-REACTIVE PHOTORESIST REMOVAL AND SPACER LAYER OPTIMIZATION IN A MAGNETORESISTIVE DEVICE' [patent_app_type] => utility [patent_app_number] => 15/147682 [patent_app_country] => US [patent_app_date] => 2016-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 10006 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15147682 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/147682
Non-reactive photoresist removal and spacer layer optimization in a magnetoresistive device May 4, 2016 Issued
Array ( [id] => 11307523 [patent_doc_number] => 09514927 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-06 [patent_title] => 'Plasma pre-clean module and process' [patent_app_type] => utility [patent_app_number] => 15/083136 [patent_app_country] => US [patent_app_date] => 2016-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9365 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15083136 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/083136
Plasma pre-clean module and process Mar 27, 2016 Issued
Array ( [id] => 11087661 [patent_doc_number] => 20160284629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-29 [patent_title] => 'Co-Packaged Die on Leadframe with Common Contact' [patent_app_type] => utility [patent_app_number] => 15/080780 [patent_app_country] => US [patent_app_date] => 2016-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9128 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15080780 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/080780
Co-packaged die on leadframe with common contact Mar 24, 2016 Issued
Array ( [id] => 12669247 [patent_doc_number] => 20180114915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-26 [patent_title] => COMPOSITION FOR FORMING HOLE COLLECTING LAYER OF PHOTOSENSOR ELEMENT, AND PHOTOSENSOR ELEMENT [patent_app_type] => utility [patent_app_number] => 15/558676 [patent_app_country] => US [patent_app_date] => 2016-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8648 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15558676 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/558676
Composition for forming hole collecting layer of photosensor element, and photosensor element Mar 15, 2016 Issued
Array ( [id] => 13071129 [patent_doc_number] => 10056350 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-21 [patent_title] => Fan-out package structure, and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 15/571581 [patent_app_country] => US [patent_app_date] => 2016-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 5726 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15571581 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/571581
Fan-out package structure, and manufacturing method thereof Mar 13, 2016 Issued
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