Search

Caleen O. Sullivan

Examiner (ID: 789, Phone: (571)272-6569 , Office: P/2896 )

Most Active Art Unit
2899
Art Unit(s)
2896, 1795, 1722, 2899, 1756
Total Applications
1358
Issued Applications
1151
Pending Applications
77
Abandoned Applications
165

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7097620 [patent_doc_number] => 20050130079 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-16 [patent_title] => 'Pattern formation method' [patent_app_type] => utility [patent_app_number] => 11/010273 [patent_app_country] => US [patent_app_date] => 2004-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5809 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0130/20050130079.pdf [firstpage_image] =>[orig_patent_app_number] => 11010273 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/010273
Pattern formation method Dec 13, 2004 Abandoned
Array ( [id] => 7097608 [patent_doc_number] => 20050130067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-16 [patent_title] => 'Pattern formation method' [patent_app_type] => utility [patent_app_number] => 11/009055 [patent_app_country] => US [patent_app_date] => 2004-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8715 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0130/20050130067.pdf [firstpage_image] =>[orig_patent_app_number] => 11009055 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/009055
Pattern formation method Dec 12, 2004 Issued
Array ( [id] => 5912755 [patent_doc_number] => 20060127817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-15 [patent_title] => 'In-line fabrication of curved surface transistors' [patent_app_type] => utility [patent_app_number] => 11/009801 [patent_app_country] => US [patent_app_date] => 2004-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4608 [patent_no_of_claims] => 55 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20060127817.pdf [firstpage_image] =>[orig_patent_app_number] => 11009801 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/009801
In-line fabrication of curved surface transistors Dec 9, 2004 Abandoned
Array ( [id] => 7097610 [patent_doc_number] => 20050130069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-16 [patent_title] => 'Resist pattern forming method' [patent_app_type] => utility [patent_app_number] => 11/007881 [patent_app_country] => US [patent_app_date] => 2004-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3705 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0130/20050130069.pdf [firstpage_image] =>[orig_patent_app_number] => 11007881 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/007881
Resist pattern forming method Dec 8, 2004 Abandoned
Array ( [id] => 864103 [patent_doc_number] => 07368226 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-06 [patent_title] => 'Method for forming fine patterns of semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/998814 [patent_app_country] => US [patent_app_date] => 2004-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 2345 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/368/07368226.pdf [firstpage_image] =>[orig_patent_app_number] => 10998814 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/998814
Method for forming fine patterns of semiconductor device Nov 29, 2004 Issued
Array ( [id] => 6983178 [patent_doc_number] => 20050153248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-14 [patent_title] => 'Method for fabricating a molding core' [patent_app_type] => utility [patent_app_number] => 10/997365 [patent_app_country] => US [patent_app_date] => 2004-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1132 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20050153248.pdf [firstpage_image] =>[orig_patent_app_number] => 10997365 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/997365
Method for fabricating a molding core Nov 22, 2004 Abandoned
Array ( [id] => 310895 [patent_doc_number] => 07527918 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-05 [patent_title] => 'Pattern forming method and method for manufacturing a semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/992349 [patent_app_country] => US [patent_app_date] => 2004-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 25 [patent_no_of_words] => 7258 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/527/07527918.pdf [firstpage_image] =>[orig_patent_app_number] => 10992349 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/992349
Pattern forming method and method for manufacturing a semiconductor device Nov 18, 2004 Issued
Array ( [id] => 7103754 [patent_doc_number] => 20050106480 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-19 [patent_title] => 'Mask, exposure method, line width measuring method, and method for manufacturing semiconductor devices' [patent_app_type] => utility [patent_app_number] => 10/985902 [patent_app_country] => US [patent_app_date] => 2004-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 13166 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20050106480.pdf [firstpage_image] =>[orig_patent_app_number] => 10985902 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/985902
Mask, exposure method, line width measuring method, and method for manufacturing semiconductor devices Nov 11, 2004 Abandoned
Array ( [id] => 7178679 [patent_doc_number] => 20050124091 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-09 [patent_title] => 'Process for making circuit board or lead frame' [patent_app_type] => utility [patent_app_number] => 10/978521 [patent_app_country] => US [patent_app_date] => 2004-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 10472 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20050124091.pdf [firstpage_image] =>[orig_patent_app_number] => 10978521 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/978521
Process for making circuit board or lead frame Nov 1, 2004 Abandoned
Array ( [id] => 7103657 [patent_doc_number] => 20050106383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-19 [patent_title] => 'Method for simultaneous patterning of features with nanometer scale gaps' [patent_app_type] => utility [patent_app_number] => 10/979023 [patent_app_country] => US [patent_app_date] => 2004-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2051 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20050106383.pdf [firstpage_image] =>[orig_patent_app_number] => 10979023 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/979023
Method for simultaneous patterning of features with nanometer scales gaps Oct 31, 2004 Issued
Array ( [id] => 7127201 [patent_doc_number] => 20050058945 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-17 [patent_title] => 'Method of making a printed wiring board with conformally plated circuit traces' [patent_app_type] => utility [patent_app_number] => 10/969684 [patent_app_country] => US [patent_app_date] => 2004-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5703 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0058/20050058945.pdf [firstpage_image] =>[orig_patent_app_number] => 10969684 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/969684
Method of making a printed wiring board with conformally plated circuit traces Oct 19, 2004 Issued
Array ( [id] => 843362 [patent_doc_number] => 07387867 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-17 [patent_title] => 'Manufacturing method of semiconductor integrated circuit device' [patent_app_type] => utility [patent_app_number] => 10/967277 [patent_app_country] => US [patent_app_date] => 2004-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 39 [patent_no_of_words] => 12701 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 316 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/387/07387867.pdf [firstpage_image] =>[orig_patent_app_number] => 10967277 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/967277
Manufacturing method of semiconductor integrated circuit device Oct 18, 2004 Issued
Array ( [id] => 170189 [patent_doc_number] => 07662545 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-16 [patent_title] => 'Decal transfer lithography' [patent_app_type] => utility [patent_app_number] => 10/965279 [patent_app_country] => US [patent_app_date] => 2004-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 24 [patent_no_of_words] => 8776 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/662/07662545.pdf [firstpage_image] =>[orig_patent_app_number] => 10965279 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/965279
Decal transfer lithography Oct 13, 2004 Issued
Array ( [id] => 7004981 [patent_doc_number] => 20050170294 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-04 [patent_title] => 'Method of forming contact hole and method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/962660 [patent_app_country] => US [patent_app_date] => 2004-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3648 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20050170294.pdf [firstpage_image] =>[orig_patent_app_number] => 10962660 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/962660
Method of forming contact hole and method of manufacturing semiconductor device Oct 12, 2004 Issued
Array ( [id] => 856608 [patent_doc_number] => 07374866 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-20 [patent_title] => 'System and method for exposure of partial edge die' [patent_app_type] => utility [patent_app_number] => 10/961939 [patent_app_country] => US [patent_app_date] => 2004-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 5679 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/374/07374866.pdf [firstpage_image] =>[orig_patent_app_number] => 10961939 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/961939
System and method for exposure of partial edge die Oct 7, 2004 Issued
Array ( [id] => 7170391 [patent_doc_number] => 20050202599 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-15 [patent_title] => 'Method of forming metal pattern having low resistivity' [patent_app_type] => utility [patent_app_number] => 10/959435 [patent_app_country] => US [patent_app_date] => 2004-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4151 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20050202599.pdf [firstpage_image] =>[orig_patent_app_number] => 10959435 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/959435
Method of forming metal pattern having low resistivity Oct 6, 2004 Issued
Array ( [id] => 596770 [patent_doc_number] => 07447559 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-04 [patent_title] => 'Apparatus and method of forming a photoresist pattern, and repair nozzle' [patent_app_type] => utility [patent_app_number] => 10/960192 [patent_app_country] => US [patent_app_date] => 2004-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2636 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/447/07447559.pdf [firstpage_image] =>[orig_patent_app_number] => 10960192 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/960192
Apparatus and method of forming a photoresist pattern, and repair nozzle Oct 5, 2004 Issued
Array ( [id] => 7251581 [patent_doc_number] => 20050074703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-07 [patent_title] => 'Exposure apparatus and method for forming fine patterns of semiconductor device using the same' [patent_app_type] => utility [patent_app_number] => 10/951828 [patent_app_country] => US [patent_app_date] => 2004-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1701 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20050074703.pdf [firstpage_image] =>[orig_patent_app_number] => 10951828 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/951828
Exposure apparatus and method for forming fine patterns of semiconductor device using the same Sep 26, 2004 Issued
Array ( [id] => 6983175 [patent_doc_number] => 20050153245 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-14 [patent_title] => 'Method for forming a pattern and method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/940757 [patent_app_country] => US [patent_app_date] => 2004-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 21025 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20050153245.pdf [firstpage_image] =>[orig_patent_app_number] => 10940757 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/940757
Method for forming a pattern and method of manufacturing semiconductor device Sep 14, 2004 Abandoned
Array ( [id] => 190726 [patent_doc_number] => 07642037 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-05 [patent_title] => 'Integrated circuit lithography' [patent_app_type] => utility [patent_app_number] => 10/927898 [patent_app_country] => US [patent_app_date] => 2004-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5220 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/642/07642037.pdf [firstpage_image] =>[orig_patent_app_number] => 10927898 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/927898
Integrated circuit lithography Aug 26, 2004 Issued
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