Search

Callie E. Shosho

Examiner (ID: 16637)

Most Active Art Unit
1714
Art Unit(s)
1796, 1714, 1794, 1787
Total Applications
875
Issued Applications
461
Pending Applications
80
Abandoned Applications
337

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14205045 [patent_doc_number] => 10269644 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-23 [patent_title] => Fin pitch scaling for high voltage devices and low voltage devices on the same wafer [patent_app_type] => utility [patent_app_number] => 15/680697 [patent_app_country] => US [patent_app_date] => 2017-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9186 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15680697 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/680697
Fin pitch scaling for high voltage devices and low voltage devices on the same wafer Aug 17, 2017 Issued
Array ( [id] => 13006061 [patent_doc_number] => 10026703 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-17 [patent_title] => Fan-out semiconductor package [patent_app_type] => utility [patent_app_number] => 15/679860 [patent_app_country] => US [patent_app_date] => 2017-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 25 [patent_no_of_words] => 11037 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15679860 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/679860
Fan-out semiconductor package Aug 16, 2017 Issued
Array ( [id] => 12223621 [patent_doc_number] => 20180061981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-01 [patent_title] => 'LATERALLY DIFFUSED METAL-OXIDE-SEMICONDUCTOR DEVICES AND FABRICATION METHODS THEREOF' [patent_app_type] => utility [patent_app_number] => 15/669322 [patent_app_country] => US [patent_app_date] => 2017-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6886 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15669322 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/669322
Laterally diffused metal-oxide-semiconductor devices and fabrication methods thereof Aug 3, 2017 Issued
Array ( [id] => 14705487 [patent_doc_number] => 10380494 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-13 [patent_title] => Josephson junctions for improved qubits [patent_app_type] => utility [patent_app_number] => 15/669139 [patent_app_country] => US [patent_app_date] => 2017-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6013 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15669139 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/669139
Josephson junctions for improved qubits Aug 3, 2017 Issued
Array ( [id] => 13188307 [patent_doc_number] => 10109681 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-23 [patent_title] => Vertical memory structure with array interconnects and method for producing the same [patent_app_type] => utility [patent_app_number] => 15/668342 [patent_app_country] => US [patent_app_date] => 2017-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5310 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15668342 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/668342
Vertical memory structure with array interconnects and method for producing the same Aug 2, 2017 Issued
Array ( [id] => 13909283 [patent_doc_number] => 20190043846 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => A PACKAGING DEVICE FOR INTEGRATED POWER SUPPLY SYSTEM AND PACKAGING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/760558 [patent_app_country] => US [patent_app_date] => 2017-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4520 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15760558 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/760558
Packaging device for integrated power supply system and packaging method thereof Jul 31, 2017 Issued
Array ( [id] => 12436446 [patent_doc_number] => 09978666 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-22 [patent_title] => Method for fabrication semiconductor device with through-substrate via [patent_app_type] => utility [patent_app_number] => 15/663679 [patent_app_country] => US [patent_app_date] => 2017-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2422 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15663679 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/663679
Method for fabrication semiconductor device with through-substrate via Jul 27, 2017 Issued
Array ( [id] => 12554376 [patent_doc_number] => 10014350 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-03 [patent_title] => Solid-state image pickup device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 15/660436 [patent_app_country] => US [patent_app_date] => 2017-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9267 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15660436 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/660436
Solid-state image pickup device and manufacturing method thereof Jul 25, 2017 Issued
Array ( [id] => 12026921 [patent_doc_number] => 20170317019 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'INTEGRATED INTERPOSER SOLUTIONS FOR 2D AND 3D IC PACKAGING' [patent_app_type] => utility [patent_app_number] => 15/651826 [patent_app_country] => US [patent_app_date] => 2017-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6922 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15651826 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/651826
Integrated interposer solutions for 2D and 3D IC packaging Jul 16, 2017 Issued
Array ( [id] => 12141161 [patent_doc_number] => 20180019244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-18 [patent_title] => 'SEMICONDUCTOR DEVICES' [patent_app_type] => utility [patent_app_number] => 15/646380 [patent_app_country] => US [patent_app_date] => 2017-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 16197 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15646380 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/646380
Semiconductor device includes a substrate having conductive contact structures thereon Jul 10, 2017 Issued
Array ( [id] => 14301281 [patent_doc_number] => 10290775 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-14 [patent_title] => Luminescent ceramic for a light emitting device [patent_app_type] => utility [patent_app_number] => 15/647092 [patent_app_country] => US [patent_app_date] => 2017-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4367 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15647092 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/647092
Luminescent ceramic for a light emitting device Jul 10, 2017 Issued
Array ( [id] => 11997516 [patent_doc_number] => 20170301671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-19 [patent_title] => 'FIN PITCH SCALING FOR HIGH VOLTAGE DEVICES AND LOW VOLTAGE DEVICES ON THE SAME WAFER' [patent_app_type] => utility [patent_app_number] => 15/634307 [patent_app_country] => US [patent_app_date] => 2017-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9622 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15634307 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/634307
Fin pitch scaling for high voltage devices and low voltage devices on the same wafer Jun 26, 2017 Issued
Array ( [id] => 11990328 [patent_doc_number] => 20170294483 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-12 [patent_title] => 'MEMORY DEVICE INCLUDING OVONIC THRESHOLD SWITCH ADJUSTING THRESHOLD VOLTAGE THEREOF' [patent_app_type] => utility [patent_app_number] => 15/632969 [patent_app_country] => US [patent_app_date] => 2017-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 20110 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15632969 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/632969
Memory device including ovonic threshold switch adjusting threshold voltage thereof Jun 25, 2017 Issued
Array ( [id] => 11990359 [patent_doc_number] => 20170294513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-12 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 15/628925 [patent_app_country] => US [patent_app_date] => 2017-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11758 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15628925 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/628925
Method of manufacturing a MOSFET on an SOI substrate Jun 20, 2017 Issued
Array ( [id] => 11967160 [patent_doc_number] => 20170271313 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-21 [patent_title] => 'Semiconductor Devices for Integration with Light Emitting Chips and Modules Thereof' [patent_app_type] => utility [patent_app_number] => 15/615031 [patent_app_country] => US [patent_app_date] => 2017-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6916 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15615031 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/615031
Semiconductor devices for integration with light emitting chips and modules thereof Jun 5, 2017 Issued
Array ( [id] => 11967014 [patent_doc_number] => 20170271167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-21 [patent_title] => 'FIN DENSITY CONTROL OF MULTIGATE DEVICES THROUGH SIDEWALL IMAGE TRANSFER PROCESSES' [patent_app_type] => utility [patent_app_number] => 15/613774 [patent_app_country] => US [patent_app_date] => 2017-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4395 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15613774 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/613774
Fin density control of multigate devices through sidewall image transfer processes Jun 4, 2017 Issued
Array ( [id] => 12574269 [patent_doc_number] => 10020351 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-10 [patent_title] => Electroluminescence display device [patent_app_type] => utility [patent_app_number] => 15/608734 [patent_app_country] => US [patent_app_date] => 2017-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 17092 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15608734 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/608734
Electroluminescence display device May 29, 2017 Issued
Array ( [id] => 14920371 [patent_doc_number] => 10431512 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-01 [patent_title] => Semiconductor package with barrier for radio frequency absorber [patent_app_type] => utility [patent_app_number] => 15/607265 [patent_app_country] => US [patent_app_date] => 2017-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 6363 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15607265 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/607265
Semiconductor package with barrier for radio frequency absorber May 25, 2017 Issued
Array ( [id] => 12033876 [patent_doc_number] => 20170323975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-09 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/598815 [patent_app_country] => US [patent_app_date] => 2017-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 35471 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15598815 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/598815
Thin film transistor having oxide semiconductor layer May 17, 2017 Issued
Array ( [id] => 11945879 [patent_doc_number] => 20170250029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-31 [patent_title] => 'CHIP CAPACITOR, CIRCUIT ASSEMBLY, AND ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 15/597105 [patent_app_country] => US [patent_app_date] => 2017-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 53 [patent_no_of_words] => 37713 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15597105 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/597105
Chip capacitor, circuit assembly, and electronic device May 15, 2017 Issued
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