Search

Calvin E. Vansant

Examiner (ID: 11143, Phone: (571)272-5714 , Office: P/2915 )

Most Active Art Unit
2915
Art Unit(s)
2937, 2961, 2915
Total Applications
1582
Issued Applications
1536
Pending Applications
8
Abandoned Applications
37

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13042767 [patent_doc_number] => 10043523 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-08-07 [patent_title] => Advanced packet-based sample audio concealment [patent_app_type] => utility [patent_app_number] => 15/720702 [patent_app_country] => US [patent_app_date] => 2017-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 4857 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15720702 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/720702
Advanced packet-based sample audio concealment Sep 28, 2017 Issued
Array ( [id] => 14632947 [patent_doc_number] => 20190229846 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-25 [patent_title] => CODE ERROR DETECTION METHOD, DEVICE AND SYSTEM, AND COMPUTER-READABLE STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 16/336220 [patent_app_country] => US [patent_app_date] => 2017-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9026 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16336220 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/336220
CODE ERROR DETECTION METHOD, DEVICE AND SYSTEM, AND COMPUTER-READABLE STORAGE MEDIUM Sep 26, 2017 Abandoned
Array ( [id] => 14061621 [patent_doc_number] => 10235103 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-19 [patent_title] => Apparatus, system, and method of byte addressable and block addressable storage and retrival of data to and from non-volatile storage memory [patent_app_type] => utility [patent_app_number] => 15/717762 [patent_app_country] => US [patent_app_date] => 2017-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3941 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15717762 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/717762
Apparatus, system, and method of byte addressable and block addressable storage and retrival of data to and from non-volatile storage memory Sep 26, 2017 Issued
Array ( [id] => 14425333 [patent_doc_number] => 10317466 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-11 [patent_title] => Semiconductor device, electronic device, and self-diagnosis method for semiconductor device [patent_app_type] => utility [patent_app_number] => 15/707532 [patent_app_country] => US [patent_app_date] => 2017-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 4920 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15707532 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/707532
Semiconductor device, electronic device, and self-diagnosis method for semiconductor device Sep 17, 2017 Issued
Array ( [id] => 14770813 [patent_doc_number] => 10396819 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-08-27 [patent_title] => Transmitter apparatus and bit interleaving method thereof [patent_app_type] => utility [patent_app_number] => 15/686280 [patent_app_country] => US [patent_app_date] => 2017-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 46 [patent_no_of_words] => 40333 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 328 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15686280 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/686280
Transmitter apparatus and bit interleaving method thereof Aug 24, 2017 Issued
Array ( [id] => 12220823 [patent_doc_number] => 20180059184 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-01 [patent_title] => 'JTAG DEBUG APPARATUS AND JTAG DEBUG METHOD' [patent_app_type] => utility [patent_app_number] => 15/686740 [patent_app_country] => US [patent_app_date] => 2017-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7125 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15686740 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/686740
JTAG DEBUG APPARATUS AND JTAG DEBUG METHOD Aug 24, 2017 Abandoned
Array ( [id] => 14734031 [patent_doc_number] => 10386411 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-20 [patent_title] => Sequential test access port selection in a JTAG interface [patent_app_type] => utility [patent_app_number] => 15/684334 [patent_app_country] => US [patent_app_date] => 2017-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4069 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15684334 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/684334
Sequential test access port selection in a JTAG interface Aug 22, 2017 Issued
Array ( [id] => 13995317 [patent_doc_number] => 20190066816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 15/683430 [patent_app_country] => US [patent_app_date] => 2017-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6938 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15683430 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/683430
Semiconductor memory device Aug 21, 2017 Issued
Array ( [id] => 14527353 [patent_doc_number] => 10340950 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-02 [patent_title] => Reducing the search space of maximum-likelihood decoding for polar codes [patent_app_type] => utility [patent_app_number] => 15/682387 [patent_app_country] => US [patent_app_date] => 2017-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 26 [patent_no_of_words] => 18217 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15682387 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/682387
Reducing the search space of maximum-likelihood decoding for polar codes Aug 20, 2017 Issued
Array ( [id] => 15516937 [patent_doc_number] => 10565055 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-18 [patent_title] => Semiconductor memory device including an error correction code circuit [patent_app_type] => utility [patent_app_number] => 15/681082 [patent_app_country] => US [patent_app_date] => 2017-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3075 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15681082 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/681082
Semiconductor memory device including an error correction code circuit Aug 17, 2017 Issued
Array ( [id] => 14362813 [patent_doc_number] => 10302701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-28 [patent_title] => Memory apparatus relating to determination of a failed region and test method thereof, memory module and system using the same [patent_app_type] => utility [patent_app_number] => 15/674903 [patent_app_country] => US [patent_app_date] => 2017-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5012 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15674903 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/674903
Memory apparatus relating to determination of a failed region and test method thereof, memory module and system using the same Aug 10, 2017 Issued
Array ( [id] => 16472407 [patent_doc_number] => 20200373945 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-26 [patent_title] => RATE MATCHING IN POLAR CODES [patent_app_type] => utility [patent_app_number] => 16/637199 [patent_app_country] => US [patent_app_date] => 2017-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6082 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16637199 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/637199
RATE MATCHING IN POLAR CODES Aug 9, 2017 Abandoned
Array ( [id] => 16095451 [patent_doc_number] => 20200201712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-25 [patent_title] => METHOD AND APPARATUS FOR GENERATING REDUNDANT BITS FOR ERROR DETECTION [patent_app_type] => utility [patent_app_number] => 16/637385 [patent_app_country] => US [patent_app_date] => 2017-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6887 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16637385 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/637385
Method and apparatus for generating redundant bits for error detection Aug 8, 2017 Issued
Array ( [id] => 12128179 [patent_doc_number] => 20180011764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-11 [patent_title] => 'DISTRIBUTED STORAGE SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/662510 [patent_app_country] => US [patent_app_date] => 2017-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 46 [patent_no_of_words] => 34316 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15662510 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/662510
Distributed storage system Jul 27, 2017 Issued
Array ( [id] => 14921773 [patent_doc_number] => 10432221 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-01 [patent_title] => Transmitting apparatus and interleaving method thereof [patent_app_type] => utility [patent_app_number] => 15/657457 [patent_app_country] => US [patent_app_date] => 2017-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 45 [patent_no_of_words] => 45291 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 334 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15657457 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/657457
Transmitting apparatus and interleaving method thereof Jul 23, 2017 Issued
Array ( [id] => 12128062 [patent_doc_number] => 20180011647 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-11 [patent_title] => 'DATA PROTECTION SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/648402 [patent_app_country] => US [patent_app_date] => 2017-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 34620 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15648402 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/648402
DATA PROTECTION SYSTEM Jul 11, 2017 Abandoned
Array ( [id] => 14921777 [patent_doc_number] => 10432223 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-01 [patent_title] => Modulator and modulation method using non-uniform 16-symbol signal constellation for low-density parity check codeword having 4/15 code rate [patent_app_type] => utility [patent_app_number] => 15/645924 [patent_app_country] => US [patent_app_date] => 2017-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 7929 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15645924 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/645924
Modulator and modulation method using non-uniform 16-symbol signal constellation for low-density parity check codeword having 4/15 code rate Jul 9, 2017 Issued
Array ( [id] => 11998140 [patent_doc_number] => 20170302295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-19 [patent_title] => 'LOW DENSITY PARITY CHECK ENCODER HAVING LENGTH OF 64800 AND CODE RATE OF 7/15, AND LOW DENSITY PARITY CHECK ENCODING METHOD USING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/641060 [patent_app_country] => US [patent_app_date] => 2017-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7440 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15641060 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/641060
Low density parity check encoder having length of 64800 and code rate of 7/15, and low density parity check encoding method using the same Jul 2, 2017 Issued
Array ( [id] => 16325005 [patent_doc_number] => 10784986 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-22 [patent_title] => Forward error correction mechanism for peripheral component interconnect-express (PCI-e) [patent_app_type] => utility [patent_app_number] => 15/640449 [patent_app_country] => US [patent_app_date] => 2017-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 13238 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15640449 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/640449
Forward error correction mechanism for peripheral component interconnect-express (PCI-e) Jun 29, 2017 Issued
Array ( [id] => 14557771 [patent_doc_number] => 10347353 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-09 [patent_title] => Memory system [patent_app_type] => utility [patent_app_number] => 15/633358 [patent_app_country] => US [patent_app_date] => 2017-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 12448 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15633358 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/633358
Memory system Jun 25, 2017 Issued
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