Search

Calvin E. Vansant

Examiner (ID: 11143, Phone: (571)272-5714 , Office: P/2915 )

Most Active Art Unit
2915
Art Unit(s)
2937, 2961, 2915
Total Applications
1582
Issued Applications
1536
Pending Applications
8
Abandoned Applications
37

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7793030 [patent_doc_number] => 20120054586 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-01 [patent_title] => 'RECONFIGURABLE BCH DECODER' [patent_app_type] => utility [patent_app_number] => 13/044809 [patent_app_country] => US [patent_app_date] => 2011-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4526 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20120054586.pdf [firstpage_image] =>[orig_patent_app_number] => 13044809 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/044809
Reconfigurable BCH decoder Mar 9, 2011 Issued
Array ( [id] => 8395681 [patent_doc_number] => 20120233521 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-13 [patent_title] => 'APPARATUS, SYSTEM, AND METHOD FOR DECODING LINEAR BLOCK CODES IN A MEMORY CONTROLLER' [patent_app_type] => utility [patent_app_number] => 13/043085 [patent_app_country] => US [patent_app_date] => 2011-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6405 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13043085 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/043085
Apparatus, system, and method for decoding linear block codes in a memory controller Mar 7, 2011 Issued
Array ( [id] => 9169904 [patent_doc_number] => 08595597 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-26 [patent_title] => 'Adjustable programming speed for NAND memory devices' [patent_app_type] => utility [patent_app_number] => 13/039553 [patent_app_country] => US [patent_app_date] => 2011-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3137 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13039553 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/039553
Adjustable programming speed for NAND memory devices Mar 2, 2011 Issued
Array ( [id] => 8627014 [patent_doc_number] => 08359517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-22 [patent_title] => 'Memory system and method using partial ECC to achieve low power refresh and fast access to data' [patent_app_type] => utility [patent_app_number] => 13/026030 [patent_app_country] => US [patent_app_date] => 2011-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6185 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13026030 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/026030
Memory system and method using partial ECC to achieve low power refresh and fast access to data Feb 10, 2011 Issued
Array ( [id] => 6147475 [patent_doc_number] => 20110131473 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'Method For Decoding Data In Non-Volatile Storage Using Reliability Metrics Based On Multiple Reads' [patent_app_type] => utility [patent_app_number] => 13/024676 [patent_app_country] => US [patent_app_date] => 2011-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 21777 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20110131473.pdf [firstpage_image] =>[orig_patent_app_number] => 13024676 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/024676
Method for decoding data in non-volatile storage using reliability metrics based on multiple reads Feb 9, 2011 Issued
Array ( [id] => 6147476 [patent_doc_number] => 20110131474 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'ENCODING AND DECODING METHOD, AND ENCODING AND DECODING DEVICES WITH A TWO-STAGE ERROR PROTECTION PROCESS' [patent_app_type] => utility [patent_app_number] => 13/022256 [patent_app_country] => US [patent_app_date] => 2011-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8337 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20110131474.pdf [firstpage_image] =>[orig_patent_app_number] => 13022256 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/022256
Encoding and decoding method, and encoding and decoding devices with a two-stage error protection process Feb 6, 2011 Issued
Array ( [id] => 8337364 [patent_doc_number] => 20120204069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-09 [patent_title] => 'Integrated circuit and method for testing memory on the integrated circuit' [patent_app_type] => utility [patent_app_number] => 12/929616 [patent_app_country] => US [patent_app_date] => 2011-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 12691 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12929616 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/929616
Integrated circuit and method for testing memory on the integrated circuit Feb 2, 2011 Issued
Array ( [id] => 7530063 [patent_doc_number] => 08046669 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-25 [patent_title] => 'Method and apparatus for evaluating performance of a read channel' [patent_app_type] => utility [patent_app_number] => 13/007004 [patent_app_country] => US [patent_app_date] => 2011-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1995 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/046/08046669.pdf [firstpage_image] =>[orig_patent_app_number] => 13007004 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/007004
Method and apparatus for evaluating performance of a read channel Jan 13, 2011 Issued
Array ( [id] => 9765927 [patent_doc_number] => 08850275 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-30 [patent_title] => 'Encoding apparatus, decoding apparatus, and encoding and decoding system' [patent_app_type] => utility [patent_app_number] => 12/929283 [patent_app_country] => US [patent_app_date] => 2011-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5916 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12929283 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/929283
Encoding apparatus, decoding apparatus, and encoding and decoding system Jan 11, 2011 Issued
Array ( [id] => 6191200 [patent_doc_number] => 20110173484 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-14 [patent_title] => 'SOLID-STATE MASS STORAGE DEVICE AND METHOD FOR FAILURE ANTICIPATION' [patent_app_type] => utility [patent_app_number] => 12/986564 [patent_app_country] => US [patent_app_date] => 2011-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5246 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0173/20110173484.pdf [firstpage_image] =>[orig_patent_app_number] => 12986564 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/986564
Solid-state mass storage device and method for failure anticipation Jan 6, 2011 Issued
Array ( [id] => 9218496 [patent_doc_number] => 08631306 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-14 [patent_title] => 'Method and memory system using a priori probability information to read stored data' [patent_app_type] => utility [patent_app_number] => 12/985397 [patent_app_country] => US [patent_app_date] => 2011-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5565 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12985397 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/985397
Method and memory system using a priori probability information to read stored data Jan 5, 2011 Issued
Array ( [id] => 7819940 [patent_doc_number] => 20120066560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => 'ACCESS METHOD OF VOLATILE MEMORY AND ACCESS APPARATUS OF VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 12/985349 [patent_app_country] => US [patent_app_date] => 2011-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2391 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0066/20120066560.pdf [firstpage_image] =>[orig_patent_app_number] => 12985349 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/985349
ACCESS METHOD OF VOLATILE MEMORY AND ACCESS APPARATUS OF VOLATILE MEMORY Jan 5, 2011 Abandoned
Array ( [id] => 5990846 [patent_doc_number] => 20110099454 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-28 [patent_title] => 'Low Complexity LDPC Encoding Algorithm' [patent_app_type] => utility [patent_app_number] => 12/985850 [patent_app_country] => US [patent_app_date] => 2011-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2671 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20110099454.pdf [firstpage_image] =>[orig_patent_app_number] => 12985850 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/985850
Low Complexity LDPC Encoding Algorithm Jan 5, 2011 Abandoned
Array ( [id] => 9765943 [patent_doc_number] => 08850291 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-30 [patent_title] => 'Data input and output method of NAND flash memory and embedded system using the same' [patent_app_type] => utility [patent_app_number] => 12/984984 [patent_app_country] => US [patent_app_date] => 2011-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2485 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12984984 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/984984
Data input and output method of NAND flash memory and embedded system using the same Jan 4, 2011 Issued
Array ( [id] => 9665908 [patent_doc_number] => 08812917 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-19 [patent_title] => 'Method and device for row and column interleaving of blocks of variable size' [patent_app_type] => utility [patent_app_number] => 12/985111 [patent_app_country] => US [patent_app_date] => 2011-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 8206 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12985111 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/985111
Method and device for row and column interleaving of blocks of variable size Jan 4, 2011 Issued
Array ( [id] => 9707440 [patent_doc_number] => 08832534 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-09-09 [patent_title] => 'LDPC decoder architecture' [patent_app_type] => utility [patent_app_number] => 12/984428 [patent_app_country] => US [patent_app_date] => 2011-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6964 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12984428 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/984428
LDPC decoder architecture Jan 3, 2011 Issued
Array ( [id] => 6182197 [patent_doc_number] => 20110179327 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-21 [patent_title] => 'COMPUTER-IMPLEMENTED METHOD FOR CORRECTING TRANSMISSION ERRORS USING LINEAR PROGRAMMING' [patent_app_type] => utility [patent_app_number] => 12/978305 [patent_app_country] => US [patent_app_date] => 2010-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 11138 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20110179327.pdf [firstpage_image] =>[orig_patent_app_number] => 12978305 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/978305
Computer-implemented method for correcting transmission errors using linear programming Dec 22, 2010 Issued
Array ( [id] => 8536175 [patent_doc_number] => 08312340 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-13 [patent_title] => 'Information processing device, data transmitting device, and data transfer method of data transmitting device' [patent_app_type] => utility [patent_app_number] => 12/926690 [patent_app_country] => US [patent_app_date] => 2010-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6572 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12926690 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/926690
Information processing device, data transmitting device, and data transfer method of data transmitting device Dec 2, 2010 Issued
Array ( [id] => 6141266 [patent_doc_number] => 20110129044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'APPARATUS AND METHOD FOR IMPROVING ERROR CORRECTION CAPABILITY USING STUFFING BYTE' [patent_app_type] => utility [patent_app_number] => 12/959725 [patent_app_country] => US [patent_app_date] => 2010-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6885 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0129/20110129044.pdf [firstpage_image] =>[orig_patent_app_number] => 12959725 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/959725
Apparatus and method for improving error correction capability using stuffing byte Dec 2, 2010 Issued
Array ( [id] => 8912460 [patent_doc_number] => 08484537 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-07-09 [patent_title] => 'Systems and methods for data-path protection' [patent_app_type] => utility [patent_app_number] => 12/950779 [patent_app_country] => US [patent_app_date] => 2010-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 22 [patent_no_of_words] => 10527 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12950779 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/950779
Systems and methods for data-path protection Nov 18, 2010 Issued
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