Search

Calvin Lee

Examiner (ID: 9149, Phone: (571)272-1896 , Office: P/2896 )

Most Active Art Unit
2896
Art Unit(s)
2825, 2815, 2892, 2818, 2896
Total Applications
2071
Issued Applications
1934
Pending Applications
11
Abandoned Applications
134

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17046592 [patent_doc_number] => 11099772 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-24 [patent_title] => Hardware double buffering using a special purpose computational unit [patent_app_type] => utility [patent_app_number] => 16/700385 [patent_app_country] => US [patent_app_date] => 2019-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7502 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16700385 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/700385
Hardware double buffering using a special purpose computational unit Dec 1, 2019 Issued
Array ( [id] => 16856774 [patent_doc_number] => 20210157519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-27 [patent_title] => SOLID-STATE DRIVE (SSD) WITH A STORAGE CONTROLLER EMPLOYING DIFFERENTIAL TWO-WIRE SERIAL BUSES TO ACCESS FLASH MEMORY [patent_app_type] => utility [patent_app_number] => 16/695366 [patent_app_country] => US [patent_app_date] => 2019-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8363 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16695366 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/695366
SOLID-STATE DRIVE (SSD) WITH A STORAGE CONTROLLER EMPLOYING DIFFERENTIAL TWO-WIRE SERIAL BUSES TO ACCESS FLASH MEMORY Nov 25, 2019 Abandoned
Array ( [id] => 16864421 [patent_doc_number] => 11023161 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-06-01 [patent_title] => Host device with multi-path layer implementing efficient load balancing for active-active configuration [patent_app_type] => utility [patent_app_number] => 16/694291 [patent_app_country] => US [patent_app_date] => 2019-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 11461 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16694291 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/694291
Host device with multi-path layer implementing efficient load balancing for active-active configuration Nov 24, 2019 Issued
Array ( [id] => 16879942 [patent_doc_number] => 11030091 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-08 [patent_title] => Semiconductor storage device for improved page reliability [patent_app_type] => utility [patent_app_number] => 16/681751 [patent_app_country] => US [patent_app_date] => 2019-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4401 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16681751 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/681751
Semiconductor storage device for improved page reliability Nov 11, 2019 Issued
Array ( [id] => 16826257 [patent_doc_number] => 20210141550 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-13 [patent_title] => USING SPARE BITS IN MEMORY SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/677740 [patent_app_country] => US [patent_app_date] => 2019-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5368 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16677740 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/677740
Using spare bits in memory systems Nov 7, 2019 Issued
Array ( [id] => 17454669 [patent_doc_number] => 11269528 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-08 [patent_title] => Data storage device with reduced memory access operation method thereof and controller therefor [patent_app_type] => utility [patent_app_number] => 16/676336 [patent_app_country] => US [patent_app_date] => 2019-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7378 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16676336 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/676336
Data storage device with reduced memory access operation method thereof and controller therefor Nov 5, 2019 Issued
Array ( [id] => 16780046 [patent_doc_number] => 20210117125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-22 [patent_title] => SERVER SYSTEM WITH SOLID STATE DRIVES AND ASSOCIATED CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 16/674397 [patent_app_country] => US [patent_app_date] => 2019-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5055 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16674397 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/674397
SERVER SYSTEM WITH SOLID STATE DRIVES AND ASSOCIATED CONTROL METHOD Nov 4, 2019 Abandoned
Array ( [id] => 16787854 [patent_doc_number] => 10990286 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-04-27 [patent_title] => Parallel upgrade of nodes in a storage system [patent_app_type] => utility [patent_app_number] => 16/668770 [patent_app_country] => US [patent_app_date] => 2019-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 15385 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16668770 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/668770
Parallel upgrade of nodes in a storage system Oct 29, 2019 Issued
Array ( [id] => 17492239 [patent_doc_number] => 11281542 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-22 [patent_title] => System and method for backup generation for deployments [patent_app_type] => utility [patent_app_number] => 16/656982 [patent_app_country] => US [patent_app_date] => 2019-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8066 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16656982 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/656982
System and method for backup generation for deployments Oct 17, 2019 Issued
Array ( [id] => 18119314 [patent_doc_number] => 11550709 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-10 [patent_title] => Memory device and wear leveling method for the same [patent_app_type] => utility [patent_app_number] => 16/655510 [patent_app_country] => US [patent_app_date] => 2019-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3333 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16655510 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/655510
Memory device and wear leveling method for the same Oct 16, 2019 Issued
Array ( [id] => 16780249 [patent_doc_number] => 20210117328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-22 [patent_title] => DIRECT INPUT/OUTPUT PATH TO COMPRESSED DATA [patent_app_type] => utility [patent_app_number] => 16/656222 [patent_app_country] => US [patent_app_date] => 2019-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7061 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16656222 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/656222
Direct input/output path to compressed data Oct 16, 2019 Issued
Array ( [id] => 17771291 [patent_doc_number] => 11403233 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-02 [patent_title] => Determining capacity in a global deduplication system [patent_app_type] => utility [patent_app_number] => 16/653519 [patent_app_country] => US [patent_app_date] => 2019-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5492 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16653519 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/653519
Determining capacity in a global deduplication system Oct 14, 2019 Issued
Array ( [id] => 16764281 [patent_doc_number] => 20210109862 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-15 [patent_title] => ROUTING TRAFFIC OF A LOGICAL UNIT TO MULTIPLE BACKEND DATA OBJECTS BASED ON METADATA MAPPING [patent_app_type] => utility [patent_app_number] => 16/653548 [patent_app_country] => US [patent_app_date] => 2019-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10777 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16653548 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/653548
Routing traffic of a logical unit to multiple backend data objects based on metadata mapping Oct 14, 2019 Issued
Array ( [id] => 17288169 [patent_doc_number] => 11204718 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-21 [patent_title] => Apparatuses, systems, and methods to store pre-read data associated with a modify-write operation [patent_app_type] => utility [patent_app_number] => 16/586428 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 7032 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16586428 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/586428
Apparatuses, systems, and methods to store pre-read data associated with a modify-write operation Sep 26, 2019 Issued
Array ( [id] => 17817129 [patent_doc_number] => 11422740 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-23 [patent_title] => Raid storage-device-assisted data update system [patent_app_type] => utility [patent_app_number] => 16/586445 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 9819 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 397 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16586445 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/586445
Raid storage-device-assisted data update system Sep 26, 2019 Issued
Array ( [id] => 16722315 [patent_doc_number] => 20210089462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => SYSTEM PROBE AWARE LAST LEVEL CACHE INSERTION BYPASSING [patent_app_type] => utility [patent_app_number] => 16/580139 [patent_app_country] => US [patent_app_date] => 2019-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4384 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16580139 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/580139
System probe aware last level cache insertion bypassing Sep 23, 2019 Issued
Array ( [id] => 15935645 [patent_doc_number] => 20200159456 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => MEMORY CONTROLLER AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 16/576267 [patent_app_country] => US [patent_app_date] => 2019-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15094 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16576267 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/576267
Memory controller for controlling multiple types of flash memories, and memory system Sep 18, 2019 Issued
Array ( [id] => 16675711 [patent_doc_number] => 20210064477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => METHOD AND SYSTEM FOR ANY-POINT IN TIME RECOVERY WITHIN TRADITIONAL STORAGE SYSTEM VIA A CONTINUOUS DATA PROTECTION INTERCEPTOR [patent_app_type] => utility [patent_app_number] => 16/553336 [patent_app_country] => US [patent_app_date] => 2019-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8813 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16553336 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/553336
Method and system for any-point in time recovery within traditional storage system via a continuous data protection interceptor Aug 27, 2019 Issued
Array ( [id] => 17365012 [patent_doc_number] => 11232033 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-25 [patent_title] => Application aware SoC memory cache partitioning [patent_app_type] => utility [patent_app_number] => 16/530216 [patent_app_country] => US [patent_app_date] => 2019-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9227 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16530216 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/530216
Application aware SoC memory cache partitioning Aug 1, 2019 Issued
Array ( [id] => 16615620 [patent_doc_number] => 20210034273 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => METHOD AND SYSTEM FOR POLICY CLASS BASED DATA MIGRATION [patent_app_type] => utility [patent_app_number] => 16/529775 [patent_app_country] => US [patent_app_date] => 2019-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6439 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16529775 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/529775
Method and system for policy class based data migration Jul 31, 2019 Issued
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