Search

Calvin Y Choi

Examiner (ID: 9451, Phone: (571)270-7882 , Office: P/2812 )

Most Active Art Unit
2812
Art Unit(s)
2812, 4116
Total Applications
1008
Issued Applications
793
Pending Applications
53
Abandoned Applications
162

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11803059 [patent_doc_number] => 09543986 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-10 [patent_title] => 'Communication device for uplink transmission with encoded information bits and method thereof' [patent_app_type] => utility [patent_app_number] => 13/957151 [patent_app_country] => US [patent_app_date] => 2013-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4828 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13957151 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/957151
Communication device for uplink transmission with encoded information bits and method thereof Jul 31, 2013 Issued
Array ( [id] => 9297041 [patent_doc_number] => 20140040675 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-06 [patent_title] => 'DATA PROCESSING METHOD AND APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/955302 [patent_app_country] => US [patent_app_date] => 2013-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6373 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13955302 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/955302
Data processing method and apparatus for processing a plurality of received copies of the same original data Jul 30, 2013 Issued
Array ( [id] => 9859944 [patent_doc_number] => 20150039961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-05 [patent_title] => 'TURBO ENCODING ON A PARALLEL PROCESSOR' [patent_app_type] => utility [patent_app_number] => 13/955513 [patent_app_country] => US [patent_app_date] => 2013-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5187 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13955513 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/955513
Turbo encoding on a parallel processor Jul 30, 2013 Issued
Array ( [id] => 13086543 [patent_doc_number] => 10063348 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-28 [patent_title] => Retransmission data processing device, retransmission data communication device, retransmission data communication system, retransmission data processing method, retransmission data communication method, and non-transitory computer readable medium for detecting abnormality by comparing retransmission data to transmission data [patent_app_type] => utility [patent_app_number] => 14/909059 [patent_app_country] => US [patent_app_date] => 2013-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4878 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14909059 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/909059
Retransmission data processing device, retransmission data communication device, retransmission data communication system, retransmission data processing method, retransmission data communication method, and non-transitory computer readable medium for detecting abnormality by comparing retransmission data to transmission data Jul 29, 2013 Issued
Array ( [id] => 9341603 [patent_doc_number] => 20140068387 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'TRANSMITTING APPARATUS, RECEIVING APPARATUS, TRANSMITTING METHOD AND RECEIVING METHOD FOR COMMUNICATING DATA CODED WITH LOW DENSITY PARITY CHECK (LDPC) CODES' [patent_app_type] => utility [patent_app_number] => 13/954664 [patent_app_country] => US [patent_app_date] => 2013-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5082 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13954664 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/954664
TRANSMITTING APPARATUS, RECEIVING APPARATUS, TRANSMITTING METHOD AND RECEIVING METHOD FOR COMMUNICATING DATA CODED WITH LOW DENSITY PARITY CHECK (LDPC) CODES Jul 29, 2013 Abandoned
Array ( [id] => 11345267 [patent_doc_number] => 09529673 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-27 [patent_title] => 'Memory device having adjustable refresh period and method of operating the same' [patent_app_type] => utility [patent_app_number] => 13/953933 [patent_app_country] => US [patent_app_date] => 2013-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 7687 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13953933 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/953933
Memory device having adjustable refresh period and method of operating the same Jul 29, 2013 Issued
Array ( [id] => 10922291 [patent_doc_number] => 20140325311 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-30 [patent_title] => 'HYBRID ERROR CORRECTION METHOD AND MEMORY REPAIR APPARATUS THEREOF' [patent_app_type] => utility [patent_app_number] => 13/951436 [patent_app_country] => US [patent_app_date] => 2013-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3898 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13951436 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/951436
HYBRID ERROR CORRECTION METHOD AND MEMORY REPAIR APPARATUS THEREOF Jul 24, 2013 Abandoned
Array ( [id] => 10150781 [patent_doc_number] => 09183070 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-10 [patent_title] => 'Resting blocks of memory cells in response to the blocks being deemed to fail' [patent_app_type] => utility [patent_app_number] => 13/949560 [patent_app_country] => US [patent_app_date] => 2013-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5848 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13949560 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/949560
Resting blocks of memory cells in response to the blocks being deemed to fail Jul 23, 2013 Issued
13/980317 EVALUATION OF POLYNOMIALS OVER FINITE FIELDS AND DECODING OF CYCLIC CODES Jul 17, 2013 Abandoned
Array ( [id] => 9800844 [patent_doc_number] => 20150012787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-08 [patent_title] => 'TESTING OF NON-VOLATILE MEMORY ARRAYS' [patent_app_type] => utility [patent_app_number] => 13/935138 [patent_app_country] => US [patent_app_date] => 2013-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5735 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13935138 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/935138
Testing of non-volatile memory arrays Jul 2, 2013 Issued
Array ( [id] => 10337291 [patent_doc_number] => 20150222296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-06 [patent_title] => 'CIRCUIT, ENCODER AND METHOD FOR PARALLEL BCH CODING' [patent_app_type] => utility [patent_app_number] => 14/409982 [patent_app_country] => US [patent_app_date] => 2013-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4387 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14409982 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/409982
Parallel BCH coding circuit, encoder and method Jun 17, 2013 Issued
Array ( [id] => 9645142 [patent_doc_number] => 20140223255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-07 [patent_title] => 'DECODER HAVING EARLY DECODING TERMINATION DETECTION' [patent_app_type] => utility [patent_app_number] => 13/918400 [patent_app_country] => US [patent_app_date] => 2013-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9948 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13918400 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/918400
DECODER HAVING EARLY DECODING TERMINATION DETECTION Jun 13, 2013 Abandoned
Array ( [id] => 9746074 [patent_doc_number] => 20140281793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'DATA DECODING ACROSS MULTIPLE TRACKS' [patent_app_type] => utility [patent_app_number] => 13/834216 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4531 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13834216 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/834216
DATA DECODING ACROSS MULTIPLE TRACKS Mar 14, 2013 Abandoned
Array ( [id] => 9746083 [patent_doc_number] => 20140281802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'MULTI-DIMENSIONAL ERROR DETECTION AND CORRECTION MEMORY AND COMPUTING ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 13/835432 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5538 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13835432 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/835432
MULTI-DIMENSIONAL ERROR DETECTION AND CORRECTION MEMORY AND COMPUTING ARCHITECTURE Mar 14, 2013 Abandoned
Array ( [id] => 9746045 [patent_doc_number] => 20140281764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'DATA PATH MEMORY TEST' [patent_app_type] => utility [patent_app_number] => 13/835064 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2797 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13835064 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/835064
DATA PATH MEMORY TEST Mar 14, 2013 Abandoned
Array ( [id] => 11226698 [patent_doc_number] => 09454420 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-09-27 [patent_title] => 'Method and system of reading threshold voltage equalization' [patent_app_type] => utility [patent_app_number] => 13/831697 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 11017 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13831697 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/831697
Method and system of reading threshold voltage equalization Mar 14, 2013 Issued
Array ( [id] => 9083292 [patent_doc_number] => 20130268822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-10 [patent_title] => 'CORRECTABLE PARITY PROTECTED MEMORY' [patent_app_type] => utility [patent_app_number] => 13/835486 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 15971 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13835486 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/835486
Correctable parity protected memory Mar 14, 2013 Issued
Array ( [id] => 10651138 [patent_doc_number] => 09367389 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-14 [patent_title] => 'Recovery strategy that reduces errors misidentified as reliable' [patent_app_type] => utility [patent_app_number] => 13/804495 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5860 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13804495 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/804495
Recovery strategy that reduces errors misidentified as reliable Mar 13, 2013 Issued
Array ( [id] => 10639105 [patent_doc_number] => 09356622 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-31 [patent_title] => 'Apparatus and method for reconstructing a bit sequence with preliminary correction' [patent_app_type] => utility [patent_app_number] => 13/803324 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5660 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13803324 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/803324
Apparatus and method for reconstructing a bit sequence with preliminary correction Mar 13, 2013 Issued
Array ( [id] => 9746124 [patent_doc_number] => 20140281842 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'Non-Volatile Cells Having a Non-Power-of-Two Number of States' [patent_app_type] => utility [patent_app_number] => 13/831047 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 18278 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13831047 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/831047
Non-Volatile Cells Having a Non-Power-of-Two Number of States Mar 13, 2013 Abandoned
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