Search

Cam N Nguyen

Examiner (ID: 5643, Phone: (571)272-1357 , Office: P/1736 )

Most Active Art Unit
1736
Art Unit(s)
1736, 1793, 1754
Total Applications
2328
Issued Applications
1758
Pending Applications
181
Abandoned Applications
389

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14624239 [patent_doc_number] => 20190225487 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-25 [patent_title] => Micro-electro-mechanical device with ion exchange polymer [patent_app_type] => utility [patent_app_number] => 15/998668 [patent_app_country] => US [patent_app_date] => 2018-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3871 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 17 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15998668 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/998668
Micro-electro-mechanical device with ion exchange polymer Aug 14, 2018 Abandoned
Array ( [id] => 13996205 [patent_doc_number] => 20190067260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/103507 [patent_app_country] => US [patent_app_date] => 2018-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6310 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16103507 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/103507
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME Aug 13, 2018 Abandoned
Array ( [id] => 14587811 [patent_doc_number] => 20190221514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-18 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING SWITCH CELLS [patent_app_type] => utility [patent_app_number] => 16/103450 [patent_app_country] => US [patent_app_date] => 2018-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9190 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16103450 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/103450
Semiconductor device including switch cells Aug 13, 2018 Issued
Array ( [id] => 15286785 [patent_doc_number] => 10516064 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-12-24 [patent_title] => Multiple width nanosheet devices [patent_app_type] => utility [patent_app_number] => 16/103283 [patent_app_country] => US [patent_app_date] => 2018-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 6423 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16103283 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/103283
Multiple width nanosheet devices Aug 13, 2018 Issued
Array ( [id] => 15250427 [patent_doc_number] => 10510742 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-12-17 [patent_title] => Integrated circuit structure [patent_app_type] => utility [patent_app_number] => 16/103552 [patent_app_country] => US [patent_app_date] => 2018-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5255 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16103552 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/103552
Integrated circuit structure Aug 13, 2018 Issued
Array ( [id] => 15245029 [patent_doc_number] => 10508027 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-17 [patent_title] => CMOS-MEMS structure and method of forming the same [patent_app_type] => utility [patent_app_number] => 16/058897 [patent_app_country] => US [patent_app_date] => 2018-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 6783 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16058897 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/058897
CMOS-MEMS structure and method of forming the same Aug 7, 2018 Issued
Array ( [id] => 18102282 [patent_doc_number] => 11542157 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-03 [patent_title] => Microchip [patent_app_type] => utility [patent_app_number] => 16/758362 [patent_app_country] => US [patent_app_date] => 2018-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 4412 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16758362 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/758362
Microchip Aug 6, 2018 Issued
Array ( [id] => 17119550 [patent_doc_number] => 11130672 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-28 [patent_title] => Micromechanical device and corresponding production method [patent_app_type] => utility [patent_app_number] => 16/636939 [patent_app_country] => US [patent_app_date] => 2018-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1785 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16636939 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/636939
Micromechanical device and corresponding production method Jul 29, 2018 Issued
Array ( [id] => 15250881 [patent_doc_number] => 10510971 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-17 [patent_title] => Vapor-deposited nanoscale ionic liquid gels as gate insulators for low-voltage high-speed thin film transistors [patent_app_type] => utility [patent_app_number] => 16/038750 [patent_app_country] => US [patent_app_date] => 2018-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 10517 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16038750 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/038750
Vapor-deposited nanoscale ionic liquid gels as gate insulators for low-voltage high-speed thin film transistors Jul 17, 2018 Issued
Array ( [id] => 16156149 [patent_doc_number] => 20200216307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-09 [patent_title] => METHOD FOR MANUFACTURING DUAL-CAVITY STRUCTURE, AND DUAL-CAVITY STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/628001 [patent_app_country] => US [patent_app_date] => 2018-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2943 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16628001 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/628001
METHOD FOR MANUFACTURING DUAL-CAVITY STRUCTURE, AND DUAL-CAVITY STRUCTURE Jul 2, 2018 Abandoned
Array ( [id] => 15475133 [patent_doc_number] => 10553451 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/017735 [patent_app_country] => US [patent_app_date] => 2018-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 93 [patent_no_of_words] => 37067 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16017735 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/017735
Semiconductor device and manufacturing method thereof Jun 24, 2018 Issued
Array ( [id] => 16756424 [patent_doc_number] => 10974959 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-04-13 [patent_title] => Methods for charge-titrating assembly of partially metallized nanoparticles, and metamaterials produced therefrom [patent_app_type] => utility [patent_app_number] => 16/011834 [patent_app_country] => US [patent_app_date] => 2018-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 11473 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16011834 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/011834
Methods for charge-titrating assembly of partially metallized nanoparticles, and metamaterials produced therefrom Jun 18, 2018 Issued
Array ( [id] => 15962747 [patent_doc_number] => 20200165125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => Method of Providing a Plurality of Through-Holes in a Layer of Structural Material [patent_app_type] => utility [patent_app_number] => 16/619512 [patent_app_country] => US [patent_app_date] => 2018-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1928 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16619512 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/619512
Method of providing a plurality of through-holes in a layer of structural material Jun 17, 2018 Issued
Array ( [id] => 16585861 [patent_doc_number] => 20210020263 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-21 [patent_title] => LATTICE METAMATERIAL HAVING PROGRAMED THERMAL EXPANSION [patent_app_type] => utility [patent_app_number] => 16/622600 [patent_app_country] => US [patent_app_date] => 2018-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22247 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16622600 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/622600
LATTICE METAMATERIAL HAVING PROGRAMED THERMAL EXPANSION Jun 13, 2018 Abandoned
Array ( [id] => 13485721 [patent_doc_number] => 20180294403 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-11 [patent_title] => Magnetic Tunnel Junctions [patent_app_type] => utility [patent_app_number] => 16/006588 [patent_app_country] => US [patent_app_date] => 2018-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4293 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16006588 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/006588
Magnetic tunnel junctions Jun 11, 2018 Issued
Array ( [id] => 15985099 [patent_doc_number] => 10672889 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-02 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 15/988496 [patent_app_country] => US [patent_app_date] => 2018-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 23 [patent_no_of_words] => 6337 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15988496 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/988496
Semiconductor device and manufacturing method thereof May 23, 2018 Issued
Array ( [id] => 14801063 [patent_doc_number] => 10403541 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-03 [patent_title] => High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed by He--N [patent_app_type] => utility [patent_app_number] => 15/977599 [patent_app_country] => US [patent_app_date] => 2018-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 7290 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 405 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15977599 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/977599
High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed by He--N May 10, 2018 Issued
Array ( [id] => 16016785 [patent_doc_number] => 20200183236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-11 [patent_title] => BLACK MATRIX, PREPARATION METHOD THEREFOR, AND SYSTEM THEREOF, DISPLAY SUBSTRATE, AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/320782 [patent_app_country] => US [patent_app_date] => 2018-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6365 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16320782 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/320782
Black matrix, preparation method therefor, and system thereof, display substrate, and display device May 7, 2018 Issued
Array ( [id] => 16433009 [patent_doc_number] => 10833107 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-10 [patent_title] => Thin film transistor, manufacturing method therefor, array substrate and display device [patent_app_type] => utility [patent_app_number] => 16/322266 [patent_app_country] => US [patent_app_date] => 2018-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 4507 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16322266 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/322266
Thin film transistor, manufacturing method therefor, array substrate and display device May 3, 2018 Issued
Array ( [id] => 15475215 [patent_doc_number] => 10553492 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Selective NFET/PFET recess of source/drain regions [patent_app_type] => utility [patent_app_number] => 15/966858 [patent_app_country] => US [patent_app_date] => 2018-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 7030 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15966858 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/966858
Selective NFET/PFET recess of source/drain regions Apr 29, 2018 Issued
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