Cam N Nguyen

Array ( [id] => 14526213 [patent_doc_number] => 10340377 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-02 [patent_title] => Edge termination for super-junction MOSFETs [patent_app_type] => utility [patent_app_number] => 15/595743 [patent_app_country] => US [patent_app_date] => 2017-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3769 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15595743 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13558967 [patent_doc_number] => 20180331031 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-15 [patent_title] => Semiconductor Device with Slotted Backside Metal for Improving Q Factor [patent_app_type] => utility [patent_app_number] => 15/594672 [patent_app_country] => US [patent_app_date] => 2017-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2309 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15594672 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12060204 [patent_doc_number] => 20170336547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-23 [patent_title] => 'IMPRINT LITHOGRAPHY METHOD, MASTER TEMPLATE FOR IMPRINT, WIRE GRID POLARIZER MANUFACTURED USING THE MASTER TEMPLATE AND DISPLAY SUBSTRATE HAVING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/594645 [patent_app_country] => US [patent_app_date] => 2017-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 47 [patent_no_of_words] => 16187 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15594645 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13085523 [patent_doc_number] => 10062835 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-28 [patent_title] => Magnetic tunnel junctions [patent_app_type] => utility [patent_app_number] => 15/588994 [patent_app_country] => US [patent_app_date] => 2017-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4251 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15588994 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11854950 [patent_doc_number] => 20170229442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-10 [patent_title] => 'ELECTROSTATIC DISCHARGE (ESD) PROTECTION DEVICE' [patent_app_type] => utility [patent_app_number] => 15/495185 [patent_app_country] => US [patent_app_date] => 2017-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3705 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15495185 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12477819 [patent_doc_number] => 09991194 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-06-05 [patent_title] => Sensor package and method of manufacture [patent_app_type] => utility [patent_app_number] => 15/490632 [patent_app_country] => US [patent_app_date] => 2017-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 27 [patent_no_of_words] => 3818 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15490632 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11840300 [patent_doc_number] => 20170222020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-03 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/486549 [patent_app_country] => US [patent_app_date] => 2017-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5151 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15486549 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12515982 [patent_doc_number] => 10002795 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-06-19 [patent_title] => Method and structure for forming vertical transistors with shared gates and separate gates [patent_app_type] => utility [patent_app_number] => 15/485915 [patent_app_country] => US [patent_app_date] => 2017-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 34 [patent_no_of_words] => 5123 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15485915 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13499717 [patent_doc_number] => 20180301401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-18 [patent_title] => MULTI-LEVEL LEAD FRAME STRUCTURES AND METHOD OF PROVIDING SAME [patent_app_type] => utility [patent_app_number] => 15/486171 [patent_app_country] => US [patent_app_date] => 2017-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5880 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15486171 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11990419 [patent_doc_number] => 20170294574 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-12 [patent_title] => 'MULTI-LAYERED MAGNETIC THIN FILM STACK AND DATA STORAGE DEVICE HAVING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/486180 [patent_app_country] => US [patent_app_date] => 2017-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9403 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15486180 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11760491 [patent_doc_number] => 20170207360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-20 [patent_title] => 'MULTIBAND DOUBLE JUNCTION PHOTODIODE AND RELATED MANUFACTURING PROCESS' [patent_app_type] => utility [patent_app_number] => 15/479034 [patent_app_country] => US [patent_app_date] => 2017-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9757 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15479034 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13470337 [patent_doc_number] => 20180286711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-04 [patent_title] => APPARATUS AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/476035 [patent_app_country] => US [patent_app_date] => 2017-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5040 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15476035 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13470817 [patent_doc_number] => 20180286951 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-04 [patent_title] => METHODS OF FORMING A VERTICAL TRANSISTOR DEVICE WITH A CHANNEL STRUCTURE COMPRISED OF ALTERNATIVE SEMICONDUCTOR MATERIALS [patent_app_type] => utility [patent_app_number] => 15/475946 [patent_app_country] => US [patent_app_date] => 2017-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7397 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15475946 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12849238 [patent_doc_number] => 20180174919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-21 [patent_title] => Dual Epitaxial Growth Process for Semiconductor Device [patent_app_type] => utility [patent_app_number] => 15/476068 [patent_app_country] => US [patent_app_date] => 2017-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10011 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15476068 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14043095 [patent_doc_number] => 20190077654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-14 [patent_title] => FLUSH-MOUNT MICROMACHINED TRANSDUCERS [patent_app_type] => utility [patent_app_number] => 16/084706 [patent_app_country] => US [patent_app_date] => 2017-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12116 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16084706 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13006017 [patent_doc_number] => 10026679 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-17 [patent_title] => Process for manufacturing a package for a surface-mount semiconductor device and semiconductor device [patent_app_type] => utility [patent_app_number] => 15/470494 [patent_app_country] => US [patent_app_date] => 2017-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 37 [patent_no_of_words] => 5672 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15470494 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14398025 [patent_doc_number] => 10312305 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-04 [patent_title] => Organic light-emitting display apparatus having protected emission layer [patent_app_type] => utility [patent_app_number] => 15/468991 [patent_app_country] => US [patent_app_date] => 2017-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7831 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15468991 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14080015 [patent_doc_number] => 20190088895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => ORGANIC EL DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/085606 [patent_app_country] => US [patent_app_date] => 2017-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10033 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16085606 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11714723 [patent_doc_number] => 20170183222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-29 [patent_title] => 'CMOS-MEMS STRUCTURE AND METHOD OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/457498 [patent_app_country] => US [patent_app_date] => 2017-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 6984 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15457498 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12147531 [patent_doc_number] => 09881789 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-30 [patent_title] => 'Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium' [patent_app_type] => utility [patent_app_number] => 15/453731 [patent_app_country] => US [patent_app_date] => 2017-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 22974 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15453731 [rel_patent_id] =>[rel_patent_doc_number] =>)