Cam N Nguyen
Examiner (ID: 5643, Phone: (571)272-1357 , Office: P/1736 )
Most Active Art Unit | 1736 |
Art Unit(s) | 1736, 1793, 1754 |
Total Applications | 2328 |
Issued Applications | 1758 |
Pending Applications | 181 |
Abandoned Applications | 389 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 12047546
[patent_doc_number] => 09825156
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-11-21
[patent_title] => 'Compound semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 14/932497
[patent_app_country] => US
[patent_app_date] => 2015-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 3778
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 193
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14932497
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/932497 | Compound semiconductor device | Nov 3, 2015 | Issued |
Array
(
[id] => 10776347
[patent_doc_number] => 20160122503
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-05-05
[patent_title] => 'RESIN COMPOSITION FOR THERMALLY CONDUCTIVE SHEET, BASE MATERIAL-ATTACHED RESIN LAYER, THERMALLY CONDUCTIVE SHEET, AND SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/931966
[patent_app_country] => US
[patent_app_date] => 2015-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 10486
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14931966
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/931966 | RESIN COMPOSITION FOR THERMALLY CONDUCTIVE SHEET, BASE MATERIAL-ATTACHED RESIN LAYER, THERMALLY CONDUCTIVE SHEET, AND SEMICONDUCTOR DEVICE | Nov 3, 2015 | Abandoned |
Array
(
[id] => 14397785
[patent_doc_number] => 10312184
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-06-04
[patent_title] => Semiconductor systems having premolded dual leadframes
[patent_app_type] => utility
[patent_app_number] => 14/932055
[patent_app_country] => US
[patent_app_date] => 2015-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 22
[patent_no_of_words] => 4654
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14932055
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/932055 | Semiconductor systems having premolded dual leadframes | Nov 3, 2015 | Issued |
Array
(
[id] => 11214858
[patent_doc_number] => 09443899
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-09-13
[patent_title] => 'BSI CMOS image sensor with improved phase detecting pixel'
[patent_app_type] => utility
[patent_app_number] => 14/932472
[patent_app_country] => US
[patent_app_date] => 2015-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 2425
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14932472
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/932472 | BSI CMOS image sensor with improved phase detecting pixel | Nov 3, 2015 | Issued |
Array
(
[id] => 11608107
[patent_doc_number] => 20170125411
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-05-04
[patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 14/932383
[patent_app_country] => US
[patent_app_date] => 2015-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 5107
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14932383
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/932383 | Semiconductor device and manufacturing method thereof | Nov 3, 2015 | Issued |
Array
(
[id] => 12019953
[patent_doc_number] => 09812667
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-11-07
[patent_title] => 'Patterning of OLED display stacks'
[patent_app_type] => utility
[patent_app_number] => 14/932051
[patent_app_country] => US
[patent_app_date] => 2015-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 8786
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14932051
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/932051 | Patterning of OLED display stacks | Nov 3, 2015 | Issued |
Array
(
[id] => 11360132
[patent_doc_number] => 09536788
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-01-03
[patent_title] => 'Complementary SOI lateral bipolar transistors with backplate bias'
[patent_app_type] => utility
[patent_app_number] => 14/886927
[patent_app_country] => US
[patent_app_date] => 2015-10-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 29
[patent_no_of_words] => 5182
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14886927
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/886927 | Complementary SOI lateral bipolar transistors with backplate bias | Oct 18, 2015 | Issued |
Array
(
[id] => 10795128
[patent_doc_number] => 20160141285
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-05-19
[patent_title] => 'ELECTROSTATIC DISCHARGE (ESD) PROTECTION DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/884981
[patent_app_country] => US
[patent_app_date] => 2015-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 3868
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14884981
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/884981 | Electrostatic discharge (ESD) protection device | Oct 15, 2015 | Issued |
Array
(
[id] => 11575585
[patent_doc_number] => 09630831
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-04-25
[patent_title] => 'Semiconductor sensing structure'
[patent_app_type] => utility
[patent_app_number] => 14/883908
[patent_app_country] => US
[patent_app_date] => 2015-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 6954
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14883908
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/883908 | Semiconductor sensing structure | Oct 14, 2015 | Issued |
Array
(
[id] => 11346376
[patent_doc_number] => 09530791
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-12-27
[patent_title] => 'Multilevel memory stack structure with joint electrode having a collar portion and methods for manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 14/883966
[patent_app_country] => US
[patent_app_date] => 2015-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
[patent_figures_cnt] => 64
[patent_no_of_words] => 16161
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14883966
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/883966 | Multilevel memory stack structure with joint electrode having a collar portion and methods for manufacturing the same | Oct 14, 2015 | Issued |
Array
(
[id] => 11346376
[patent_doc_number] => 09530791
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-12-27
[patent_title] => 'Multilevel memory stack structure with joint electrode having a collar portion and methods for manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 14/883966
[patent_app_country] => US
[patent_app_date] => 2015-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
[patent_figures_cnt] => 64
[patent_no_of_words] => 16161
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14883966
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/883966 | Multilevel memory stack structure with joint electrode having a collar portion and methods for manufacturing the same | Oct 14, 2015 | Issued |
Array
(
[id] => 11346376
[patent_doc_number] => 09530791
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-12-27
[patent_title] => 'Multilevel memory stack structure with joint electrode having a collar portion and methods for manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 14/883966
[patent_app_country] => US
[patent_app_date] => 2015-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
[patent_figures_cnt] => 64
[patent_no_of_words] => 16161
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14883966
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/883966 | Multilevel memory stack structure with joint electrode having a collar portion and methods for manufacturing the same | Oct 14, 2015 | Issued |
Array
(
[id] => 11346376
[patent_doc_number] => 09530791
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-12-27
[patent_title] => 'Multilevel memory stack structure with joint electrode having a collar portion and methods for manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 14/883966
[patent_app_country] => US
[patent_app_date] => 2015-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
[patent_figures_cnt] => 64
[patent_no_of_words] => 16161
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14883966
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/883966 | Multilevel memory stack structure with joint electrode having a collar portion and methods for manufacturing the same | Oct 14, 2015 | Issued |
Array
(
[id] => 11890972
[patent_doc_number] => 09761537
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-09-12
[patent_title] => 'Shielded radio-frequency module having reduced area'
[patent_app_type] => utility
[patent_app_number] => 14/869952
[patent_app_country] => US
[patent_app_date] => 2015-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 23
[patent_no_of_words] => 7890
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14869952
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/869952 | Shielded radio-frequency module having reduced area | Sep 28, 2015 | Issued |
Array
(
[id] => 11796833
[patent_doc_number] => 09406681
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-08-02
[patent_title] => 'Memory cell'
[patent_app_type] => utility
[patent_app_number] => 14/862758
[patent_app_country] => US
[patent_app_date] => 2015-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 8108
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14862758
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/862758 | Memory cell | Sep 22, 2015 | Issued |
Array
(
[id] => 15136325
[patent_doc_number] => 10481628
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-11-19
[patent_title] => Surfacing of subsystem power consumption on an agricultural machine
[patent_app_type] => utility
[patent_app_number] => 14/862490
[patent_app_country] => US
[patent_app_date] => 2015-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7780
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14862490
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/862490 | Surfacing of subsystem power consumption on an agricultural machine | Sep 22, 2015 | Issued |
Array
(
[id] => 10659545
[patent_doc_number] => 20160005689
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-01-07
[patent_title] => 'Interconnect Structure and Method of Forming the Same'
[patent_app_type] => utility
[patent_app_number] => 14/856358
[patent_app_country] => US
[patent_app_date] => 2015-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6044
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14856358
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/856358 | Interconnect structure and method of forming the same | Sep 15, 2015 | Issued |
Array
(
[id] => 10659815
[patent_doc_number] => 20160005959
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-01-07
[patent_title] => 'METHOD OF FORMING A MAGNETIC TUNNEL JUNCTION STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 14/851800
[patent_app_country] => US
[patent_app_date] => 2015-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 6332
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14851800
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/851800 | METHOD OF FORMING A MAGNETIC TUNNEL JUNCTION STRUCTURE | Sep 10, 2015 | Abandoned |
Array
(
[id] => 11818073
[patent_doc_number] => 09722036
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-01
[patent_title] => 'Semiconductor device with field electrode structure'
[patent_app_type] => utility
[patent_app_number] => 14/839472
[patent_app_country] => US
[patent_app_date] => 2015-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 15
[patent_no_of_words] => 6687
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14839472
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/839472 | Semiconductor device with field electrode structure | Aug 27, 2015 | Issued |
Array
(
[id] => 11321712
[patent_doc_number] => 09520461
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-12-13
[patent_title] => 'Integrated circuit with lateral flux capacitor'
[patent_app_type] => utility
[patent_app_number] => 14/839684
[patent_app_country] => US
[patent_app_date] => 2015-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 13
[patent_no_of_words] => 4286
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14839684
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/839684 | Integrated circuit with lateral flux capacitor | Aug 27, 2015 | Issued |