Cam N Nguyen
Examiner (ID: 5643, Phone: (571)272-1357 , Office: P/1736 )
Most Active Art Unit | 1736 |
Art Unit(s) | 1736, 1793, 1754 |
Total Applications | 2328 |
Issued Applications | 1758 |
Pending Applications | 181 |
Abandoned Applications | 389 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 8656950
[patent_doc_number] => 20130037779
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-02-14
[patent_title] => 'NITRIDE SEMICONDUCTOR LIGHT-EMITTING DEVICE AND METHOD FOR PRODUCING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/584353
[patent_app_country] => US
[patent_app_date] => 2012-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 15380
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13584353
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/584353 | Nitride semiconductor light-emitting device and method for producing the same | Aug 12, 2012 | Issued |
Array
(
[id] => 10876830
[patent_doc_number] => 08901620
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-12-02
[patent_title] => 'Biosensor comprising reduced graphene oxide layer'
[patent_app_type] => utility
[patent_app_number] => 13/584318
[patent_app_country] => US
[patent_app_date] => 2012-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 7118
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 33
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13584318
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/584318 | Biosensor comprising reduced graphene oxide layer | Aug 12, 2012 | Issued |
Array
(
[id] => 9013837
[patent_doc_number] => 20130228801
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-09-05
[patent_title] => 'Organic Light Emitting Diode Display and Method for Manufacturing the Same'
[patent_app_type] => utility
[patent_app_number] => 13/584758
[patent_app_country] => US
[patent_app_date] => 2012-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4427
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13584758
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/584758 | Organic light emitting diode display and method for manufacturing the same | Aug 12, 2012 | Issued |
Array
(
[id] => 9749742
[patent_doc_number] => 08841218
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-09-23
[patent_title] => 'Resist underlayer composition and process of producing integrated circuit devices using same'
[patent_app_type] => utility
[patent_app_number] => 13/571751
[patent_app_country] => US
[patent_app_date] => 2012-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5527
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13571751
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/571751 | Resist underlayer composition and process of producing integrated circuit devices using same | Aug 9, 2012 | Issued |
Array
(
[id] => 14261879
[patent_doc_number] => 10280493
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-05-07
[patent_title] => Foldable display structures
[patent_app_type] => utility
[patent_app_number] => 13/571877
[patent_app_country] => US
[patent_app_date] => 2012-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 7420
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13571877
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/571877 | Foldable display structures | Aug 9, 2012 | Issued |
Array
(
[id] => 9888878
[patent_doc_number] => 08975133
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-03-10
[patent_title] => 'Capacitors positioned at the device level in an integrated circuit product and methods of making such capacitors'
[patent_app_type] => utility
[patent_app_number] => 13/568802
[patent_app_country] => US
[patent_app_date] => 2012-08-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 22
[patent_no_of_words] => 7682
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13568802
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/568802 | Capacitors positioned at the device level in an integrated circuit product and methods of making such capacitors | Aug 6, 2012 | Issued |
Array
(
[id] => 10923922
[patent_doc_number] => 20140326943
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-11-06
[patent_title] => 'SEMICONDUCTOR DEVICE FOR ELECTRON EMISSION IN A VACUUM'
[patent_app_type] => utility
[patent_app_number] => 14/234328
[patent_app_country] => US
[patent_app_date] => 2012-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5998
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14234328
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/234328 | Semiconductor device for electron emission in a vacuum | Jul 19, 2012 | Issued |
Array
(
[id] => 8904305
[patent_doc_number] => 20130171808
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-07-04
[patent_title] => 'DOUBLE-SIDED REUSABLE TEMPLATE FOR FABRICATION OF SEMICONDUCTOR SUBSTRATES FOR PHOTOVOLTAIC CELL AND MICROELECTRONICS DEVICE MANUFACTURING'
[patent_app_type] => utility
[patent_app_number] => 13/554103
[patent_app_country] => US
[patent_app_date] => 2012-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 5910
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13554103
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/554103 | Apparatus for forming porous silicon layers on at least two surfaces of a plurality of silicon templates | Jul 19, 2012 | Issued |
Array
(
[id] => 9355937
[patent_doc_number] => 08674476
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-03-18
[patent_title] => 'Anti-fuse device structure and electroplating circuit structure and method'
[patent_app_type] => utility
[patent_app_number] => 13/535393
[patent_app_country] => US
[patent_app_date] => 2012-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 22
[patent_no_of_words] => 11314
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13535393
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/535393 | Anti-fuse device structure and electroplating circuit structure and method | Jun 27, 2012 | Issued |
Array
(
[id] => 9844075
[patent_doc_number] => 08945990
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-02-03
[patent_title] => 'Chip package and method of forming the same'
[patent_app_type] => utility
[patent_app_number] => 13/454115
[patent_app_country] => US
[patent_app_date] => 2012-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 22
[patent_no_of_words] => 6969
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13454115
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/454115 | Chip package and method of forming the same | Apr 23, 2012 | Issued |
Array
(
[id] => 10022199
[patent_doc_number] => 09064692
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-06-23
[patent_title] => 'DRAM cells and methods of forming silicon dioxide'
[patent_app_type] => utility
[patent_app_number] => 13/451316
[patent_app_country] => US
[patent_app_date] => 2012-04-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 7
[patent_no_of_words] => 3289
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13451316
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/451316 | DRAM cells and methods of forming silicon dioxide | Apr 18, 2012 | Issued |
Array
(
[id] => 9989493
[patent_doc_number] => 09034695
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-05-19
[patent_title] => 'Integrated thermal solutions for packaging integrated circuits'
[patent_app_type] => utility
[patent_app_number] => 13/444662
[patent_app_country] => US
[patent_app_date] => 2012-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 3136
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 40
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13444662
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/444662 | Integrated thermal solutions for packaging integrated circuits | Apr 10, 2012 | Issued |
Array
(
[id] => 9345602
[patent_doc_number] => 08664752
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-03-04
[patent_title] => 'Semiconductor die package and method for making the same'
[patent_app_type] => utility
[patent_app_number] => 13/430347
[patent_app_country] => US
[patent_app_date] => 2012-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 33
[patent_figures_cnt] => 125
[patent_no_of_words] => 21097
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13430347
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/430347 | Semiconductor die package and method for making the same | Mar 25, 2012 | Issued |
Array
(
[id] => 9311698
[patent_doc_number] => 08652916
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-02-18
[patent_title] => 'Self aligned impact-ionization MOS (I-MOS) device and methods of manufacture'
[patent_app_type] => utility
[patent_app_number] => 13/426966
[patent_app_country] => US
[patent_app_date] => 2012-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 25
[patent_no_of_words] => 8775
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13426966
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/426966 | Self aligned impact-ionization MOS (I-MOS) device and methods of manufacture | Mar 21, 2012 | Issued |
Array
(
[id] => 8324053
[patent_doc_number] => 20120196454
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-08-02
[patent_title] => 'LASER-BASED MATERIAL PROCESSING METHODS AND SYSTEMS'
[patent_app_type] => utility
[patent_app_number] => 13/421372
[patent_app_country] => US
[patent_app_date] => 2012-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 41
[patent_figures_cnt] => 41
[patent_no_of_words] => 35755
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13421372
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/421372 | Laser-based material processing methods and systems | Mar 14, 2012 | Issued |
Array
(
[id] => 9266574
[patent_doc_number] => 20140021490
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-01-23
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING SAME'
[patent_app_type] => utility
[patent_app_number] => 14/009685
[patent_app_country] => US
[patent_app_date] => 2012-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6304
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14009685
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/009685 | Semiconductor device and method of fabricating same | Mar 11, 2012 | Issued |
Array
(
[id] => 9127042
[patent_doc_number] => 08574991
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-11-05
[patent_title] => 'Asymmetric transistor devices formed by asymmetric spacers and tilted implantation'
[patent_app_type] => utility
[patent_app_number] => 13/417651
[patent_app_country] => US
[patent_app_date] => 2012-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 8963
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13417651
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/417651 | Asymmetric transistor devices formed by asymmetric spacers and tilted implantation | Mar 11, 2012 | Issued |
Array
(
[id] => 10004153
[patent_doc_number] => 09048252
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-06-02
[patent_title] => 'Semiconductor device and method for manufacturing semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 14/003067
[patent_app_country] => US
[patent_app_date] => 2012-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 6178
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14003067
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/003067 | Semiconductor device and method for manufacturing semiconductor device | Mar 8, 2012 | Issued |
Array
(
[id] => 8846190
[patent_doc_number] => 08455370
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-06-04
[patent_title] => 'Transfer of high temperature wafers'
[patent_app_type] => utility
[patent_app_number] => 13/410352
[patent_app_country] => US
[patent_app_date] => 2012-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 7046
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13410352
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/410352 | Transfer of high temperature wafers | Mar 1, 2012 | Issued |
Array
(
[id] => 9202340
[patent_doc_number] => 20140001517
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-01-02
[patent_title] => 'SEMICONDUCTOR ELEMENT'
[patent_app_type] => utility
[patent_app_number] => 14/003530
[patent_app_country] => US
[patent_app_date] => 2012-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2088
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14003530
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/003530 | Semiconductor element | Feb 29, 2012 | Issued |