Cam N Nguyen

Array ( [id] => 7500734 [patent_doc_number] => 20110263100 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-27 [patent_title] => 'ANTIMONY AND GERMANIUM COMPLEXES USEFUL FOR CVD/ALD OF METAL THIN FILMS' [patent_app_type] => utility [patent_app_number] => 13/168979 [patent_app_country] => US [patent_app_date] => 2011-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 18000 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20110263100.pdf [firstpage_image] =>[orig_patent_app_number] => 13168979 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8071635 [patent_doc_number] => 20110241205 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-06 [patent_title] => 'SEMICONDUCTOR WITH THROUGH-SUBSTRATE INTERCONNECT' [patent_app_type] => utility [patent_app_number] => 13/160363 [patent_app_country] => US [patent_app_date] => 2011-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 3658 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20110241205.pdf [firstpage_image] =>[orig_patent_app_number] => 13160363 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8453291 [patent_doc_number] => 20120264237 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-18 [patent_title] => 'METHODS FOR DESIGNING, FABRICATING, AND PREDICTING SHAPE FORMATIONS IN A MATERIAL' [patent_app_type] => utility [patent_app_number] => 13/159335 [patent_app_country] => US [patent_app_date] => 2011-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 23863 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13159335 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8713199 [patent_doc_number] => 08399340 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-19 [patent_title] => 'Method of manufacturing super-junction semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/157764 [patent_app_country] => US [patent_app_date] => 2011-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4500 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13157764 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8516319 [patent_doc_number] => 20120315727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-13 [patent_title] => 'Thin Power Package' [patent_app_type] => utility [patent_app_number] => 13/158229 [patent_app_country] => US [patent_app_date] => 2011-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2968 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13158229 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7755773 [patent_doc_number] => 20120028376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'Method of Controlling Critical Dimensions of Trenches in a Metallization System of a Semiconductor Device During Etch of an Etch Stop Layer' [patent_app_type] => utility [patent_app_number] => 13/157863 [patent_app_country] => US [patent_app_date] => 2011-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8673 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20120028376.pdf [firstpage_image] =>[orig_patent_app_number] => 13157863 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7662852 [patent_doc_number] => 20110312121 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-22 [patent_title] => 'METHOD FOR MANUFACTURING PHOTOELECTRIC CONVERSION DEVICE' [patent_app_type] => utility [patent_app_number] => 13/157593 [patent_app_country] => US [patent_app_date] => 2011-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11324 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0312/20110312121.pdf [firstpage_image] =>[orig_patent_app_number] => 13157593 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8516320 [patent_doc_number] => 20120315728 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-13 [patent_title] => 'Saw Type Package without Exposed Pad' [patent_app_type] => utility [patent_app_number] => 13/158219 [patent_app_country] => US [patent_app_date] => 2011-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3879 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13158219 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8055097 [patent_doc_number] => 20120077292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-29 [patent_title] => 'METHOD OF MANUFACTURING LIGHT EMITTING DIODE PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/157318 [patent_app_country] => US [patent_app_date] => 2011-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1763 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0077/20120077292.pdf [firstpage_image] =>[orig_patent_app_number] => 13157318 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9086195 [patent_doc_number] => 08557621 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-15 [patent_title] => 'Method for manufacturing thin film transistor array panel' [patent_app_type] => utility [patent_app_number] => 13/157806 [patent_app_country] => US [patent_app_date] => 2011-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 3499 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 338 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13157806 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8796486 [patent_doc_number] => 08435353 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-07 [patent_title] => 'Thin film forming apparatus and method' [patent_app_type] => utility [patent_app_number] => 13/157772 [patent_app_country] => US [patent_app_date] => 2011-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 6950 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13157772 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8516347 [patent_doc_number] => 20120315755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-13 [patent_title] => 'COPPER INTERCONNECT WITH METAL HARDMASK REMOVAL' [patent_app_type] => utility [patent_app_number] => 13/158114 [patent_app_country] => US [patent_app_date] => 2011-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2377 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13158114 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7651401 [patent_doc_number] => 20110300670 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-08 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/155377 [patent_app_country] => US [patent_app_date] => 2011-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 20659 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0300/20110300670.pdf [firstpage_image] =>[orig_patent_app_number] => 13155377 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8701430 [patent_doc_number] => 08394650 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-12 [patent_title] => 'Solar cell interconnection, module and panel method' [patent_app_type] => utility [patent_app_number] => 13/155090 [patent_app_country] => US [patent_app_date] => 2011-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 25 [patent_no_of_words] => 27952 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13155090 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8643140 [patent_doc_number] => 08368128 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-05 [patent_title] => 'Compact field effect transistor with counter-electrode and fabrication method' [patent_app_type] => utility [patent_app_number] => 13/152630 [patent_app_country] => US [patent_app_date] => 2011-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 22 [patent_no_of_words] => 7337 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13152630 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8543294 [patent_doc_number] => 08318584 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-27 [patent_title] => 'Oxide-rich liner layer for flowable CVD gapfill' [patent_app_type] => utility [patent_app_number] => 13/153016 [patent_app_country] => US [patent_app_date] => 2011-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 7441 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13153016 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8875662 [patent_doc_number] => 08470626 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-25 [patent_title] => 'Method of fabricating light emitting diode' [patent_app_type] => utility [patent_app_number] => 13/150759 [patent_app_country] => US [patent_app_date] => 2011-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3749 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13150759 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9154132 [patent_doc_number] => 08587039 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-19 [patent_title] => 'Method of forming a semiconductor device featuring a gate stressor and semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/112077 [patent_app_country] => US [patent_app_date] => 2011-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4735 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13112077 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8375198 [patent_doc_number] => 08257988 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-09-04 [patent_title] => 'Method of making light emitting diodes' [patent_app_type] => utility [patent_app_number] => 13/109053 [patent_app_country] => US [patent_app_date] => 2011-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9615 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 371 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13109053 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5932313 [patent_doc_number] => 20110210374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-01 [patent_title] => 'Tri-Gate Field-Effect Transistors Formed by Aspect Ratio Trapping' [patent_app_type] => utility [patent_app_number] => 13/107483 [patent_app_country] => US [patent_app_date] => 2011-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5713 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20110210374.pdf [firstpage_image] =>[orig_patent_app_number] => 13107483 [rel_patent_id] =>[rel_patent_doc_number] =>)