Search

Cam N Nguyen

Examiner (ID: 5643, Phone: (571)272-1357 , Office: P/1736 )

Most Active Art Unit
1736
Art Unit(s)
1736, 1793, 1754
Total Applications
2328
Issued Applications
1758
Pending Applications
181
Abandoned Applications
389

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7488995 [patent_doc_number] => 20110237025 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/071818 [patent_app_country] => US [patent_app_date] => 2011-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 20790 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20110237025.pdf [firstpage_image] =>[orig_patent_app_number] => 13071818 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/071818
Method for manufacturing semiconductor device Mar 24, 2011 Issued
Array ( [id] => 7500749 [patent_doc_number] => 20110263111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-27 [patent_title] => 'GROUP III-NITRIDE N-TYPE DOPING' [patent_app_type] => utility [patent_app_number] => 13/071215 [patent_app_country] => US [patent_app_date] => 2011-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5967 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20110263111.pdf [firstpage_image] =>[orig_patent_app_number] => 13071215 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/071215
GROUP III-NITRIDE N-TYPE DOPING Mar 23, 2011 Abandoned
Array ( [id] => 8352412 [patent_doc_number] => 08247741 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-21 [patent_title] => 'Dynamic system for variable heating or cooling of linearly conveyed substrates' [patent_app_type] => utility [patent_app_number] => 13/070673 [patent_app_country] => US [patent_app_date] => 2011-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 7645 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13070673 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/070673
Dynamic system for variable heating or cooling of linearly conveyed substrates Mar 23, 2011 Issued
Array ( [id] => 9074291 [patent_doc_number] => 08551868 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-08 [patent_title] => 'Irradiation assisted nucleation of quantum confinements by atomic layer deposition' [patent_app_type] => utility [patent_app_number] => 13/065582 [patent_app_country] => US [patent_app_date] => 2011-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8495 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13065582 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/065582
Irradiation assisted nucleation of quantum confinements by atomic layer deposition Mar 23, 2011 Issued
Array ( [id] => 8055213 [patent_doc_number] => 20120077344 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-29 [patent_title] => 'METHOD OF PATTERNING A LOW-K DIELECTRIC FILM' [patent_app_type] => utility [patent_app_number] => 13/070913 [patent_app_country] => US [patent_app_date] => 2011-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3964 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0077/20120077344.pdf [firstpage_image] =>[orig_patent_app_number] => 13070913 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/070913
Method of patterning a low-k dielectric film Mar 23, 2011 Issued
Array ( [id] => 8446125 [patent_doc_number] => 08288174 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-10-16 [patent_title] => 'Electrostatic post exposure bake apparatus and method' [patent_app_type] => utility [patent_app_number] => 13/070723 [patent_app_country] => US [patent_app_date] => 2011-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 22985 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13070723 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/070723
Electrostatic post exposure bake apparatus and method Mar 23, 2011 Issued
Array ( [id] => 7696587 [patent_doc_number] => 20110230003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-22 [patent_title] => 'PROCESS FOR FABRICATING A MULTILAYER STRUCTURE WITH POST-GRINDING TRIMMING' [patent_app_type] => utility [patent_app_number] => 13/043088 [patent_app_country] => US [patent_app_date] => 2011-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4933 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20110230003.pdf [firstpage_image] =>[orig_patent_app_number] => 13043088 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/043088
Process for fabricating a multilayer structure with post-grinding trimming Mar 7, 2011 Issued
Array ( [id] => 9195170 [patent_doc_number] => 20130334485 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-19 [patent_title] => 'MEMRISTIVE ELEMENTS THAT EXHIBIT MINIMAL SNEAK PATH CURRENT' [patent_app_type] => utility [patent_app_number] => 14/001835 [patent_app_country] => US [patent_app_date] => 2011-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4417 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14001835 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/001835
Memristive elements that exhibit minimal sneak path current Feb 27, 2011 Issued
Array ( [id] => 6073485 [patent_doc_number] => 20110139502 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-16 [patent_title] => 'WIRING BOARD MANUFACTURING METHOD, SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND WIRING BOARD' [patent_app_type] => utility [patent_app_number] => 13/034083 [patent_app_country] => US [patent_app_date] => 2011-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 11405 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0139/20110139502.pdf [firstpage_image] =>[orig_patent_app_number] => 13034083 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/034083
Wiring board manufacturing method, semiconductor device manufacturing method and wiring board Feb 23, 2011 Issued
Array ( [id] => 10870884 [patent_doc_number] => 08896084 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-25 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/578434 [patent_app_country] => US [patent_app_date] => 2011-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 24824 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13578434 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/578434
Semiconductor device Feb 22, 2011 Issued
Array ( [id] => 10876779 [patent_doc_number] => 08901569 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-02 [patent_title] => 'Power semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/578842 [patent_app_country] => US [patent_app_date] => 2011-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 7152 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13578842 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/578842
Power semiconductor device Feb 17, 2011 Issued
Array ( [id] => 8240422 [patent_doc_number] => 20120149162 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-14 [patent_title] => 'METHOD FOR MANUFACTURING SUSPENDED FIN AND GATE-ALL-AROUND FIELD EFFECT TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 13/133737 [patent_app_country] => US [patent_app_date] => 2011-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3296 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13133737 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/133737
Method for manufacturing suspended fin and gate-all-around field effect transistor Feb 16, 2011 Issued
Array ( [id] => 7777494 [patent_doc_number] => 20120040488 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-16 [patent_title] => 'METHOD OF FORMING PHOTOVOLTAIC MODULES' [patent_app_type] => utility [patent_app_number] => 13/028533 [patent_app_country] => US [patent_app_date] => 2011-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2503 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0040/20120040488.pdf [firstpage_image] =>[orig_patent_app_number] => 13028533 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/028533
Method of forming photovoltaic modules Feb 15, 2011 Issued
Array ( [id] => 5971151 [patent_doc_number] => 20110151634 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-23 [patent_title] => 'LATERAL DRAIN-EXTENDED MOSFET HAVING CHANNEL ALONG SIDEWALL OF DRAIN EXTENSION DIELECTRIC' [patent_app_type] => utility [patent_app_number] => 13/027734 [patent_app_country] => US [patent_app_date] => 2011-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6672 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20110151634.pdf [firstpage_image] =>[orig_patent_app_number] => 13027734 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/027734
Lateral drain-extended MOSFET having channel along sidewall of drain extension dielectric Feb 14, 2011 Issued
Array ( [id] => 6047797 [patent_doc_number] => 20110207322 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/026830 [patent_app_country] => US [patent_app_date] => 2011-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 8584 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20110207322.pdf [firstpage_image] =>[orig_patent_app_number] => 13026830 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/026830
Method of manufacturing semiconductor device Feb 13, 2011 Issued
Array ( [id] => 6047720 [patent_doc_number] => 20110207269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'TRANSISTOR AND MANUFACTURING METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 13/026520 [patent_app_country] => US [patent_app_date] => 2011-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10016 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20110207269.pdf [firstpage_image] =>[orig_patent_app_number] => 13026520 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/026520
Transistor and manufacturing method of the same Feb 13, 2011 Issued
Array ( [id] => 8713142 [patent_doc_number] => 08399282 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-19 [patent_title] => 'Method for forming pad in wafer with three-dimensional stacking structure' [patent_app_type] => utility [patent_app_number] => 13/026963 [patent_app_country] => US [patent_app_date] => 2011-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 3059 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13026963 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/026963
Method for forming pad in wafer with three-dimensional stacking structure Feb 13, 2011 Issued
Array ( [id] => 6015945 [patent_doc_number] => 20110223769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-15 [patent_title] => 'METHOD OF FABRICATING A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/026527 [patent_app_country] => US [patent_app_date] => 2011-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4172 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0223/20110223769.pdf [firstpage_image] =>[orig_patent_app_number] => 13026527 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/026527
METHOD OF FABRICATING A SEMICONDUCTOR DEVICE Feb 13, 2011 Abandoned
Array ( [id] => 8340081 [patent_doc_number] => 08242004 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-14 [patent_title] => 'Semiconductor device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 13/026758 [patent_app_country] => US [patent_app_date] => 2011-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 15017 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13026758 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/026758
Semiconductor device and method of fabricating the same Feb 13, 2011 Issued
Array ( [id] => 8340017 [patent_doc_number] => 08241940 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-14 [patent_title] => 'Double-sided reusable template for fabrication of semiconductor substrates for photovoltaic cell and microelectronics device manufacturing' [patent_app_type] => utility [patent_app_number] => 13/026239 [patent_app_country] => US [patent_app_date] => 2011-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 5890 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13026239 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/026239
Double-sided reusable template for fabrication of semiconductor substrates for photovoltaic cell and microelectronics device manufacturing Feb 11, 2011 Issued
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