Search

Cam N Nguyen

Examiner (ID: 5643, Phone: (571)272-1357 , Office: P/1736 )

Most Active Art Unit
1736
Art Unit(s)
1736, 1793, 1754
Total Applications
2328
Issued Applications
1758
Pending Applications
181
Abandoned Applications
389

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8347399 [patent_doc_number] => 20120208321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-16 [patent_title] => 'PASSIVATION LAYER FOR SEMICONDUCTOR DEVICE PACKAGING' [patent_app_type] => utility [patent_app_number] => 13/025717 [patent_app_country] => US [patent_app_date] => 2011-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4135 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13025717 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/025717
Passivation layer for semiconductor device packaging Feb 10, 2011 Issued
Array ( [id] => 7510945 [patent_doc_number] => 20110256655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-20 [patent_title] => 'LOW VOLTAGE LOW LIGHT IMAGER AND PHOTODETECTOR' [patent_app_type] => utility [patent_app_number] => 13/026119 [patent_app_country] => US [patent_app_date] => 2011-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 11969 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0256/20110256655.pdf [firstpage_image] =>[orig_patent_app_number] => 13026119 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/026119
Low voltage low light imager and photodetector Feb 10, 2011 Issued
Array ( [id] => 7573623 [patent_doc_number] => 20110269279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-03 [patent_title] => 'METHOD FOR FORMING JUNCTIONS OF VERTICAL CELLS IN SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/025586 [patent_app_country] => US [patent_app_date] => 2011-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6137 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0269/20110269279.pdf [firstpage_image] =>[orig_patent_app_number] => 13025586 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/025586
Method for forming junctions of vertical cells in semiconductor device Feb 10, 2011 Issued
Array ( [id] => 8270299 [patent_doc_number] => 08211804 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-03 [patent_title] => 'Methods of forming a hole having a vertical profile and semiconductor devices having a vertical hole' [patent_app_type] => utility [patent_app_number] => 13/025410 [patent_app_country] => US [patent_app_date] => 2011-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 30 [patent_no_of_words] => 7137 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13025410 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/025410
Methods of forming a hole having a vertical profile and semiconductor devices having a vertical hole Feb 10, 2011 Issued
13/025609 SELF ALIGNED IMPACT-IONIZATION MOS (I-MOS) DEVICE AND METHODS OF MANUFACTURE Feb 10, 2011 Abandoned
Array ( [id] => 7580372 [patent_doc_number] => 20110294255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-01 [patent_title] => 'METHOD FOR FORMING SILICON TRENCH' [patent_app_type] => utility [patent_app_number] => 13/026164 [patent_app_country] => US [patent_app_date] => 2011-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3000 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20110294255.pdf [firstpage_image] =>[orig_patent_app_number] => 13026164 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/026164
Method for forming silicon trench Feb 10, 2011 Issued
Array ( [id] => 6137182 [patent_doc_number] => 20110127530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE' [patent_app_type] => utility [patent_app_number] => 13/025011 [patent_app_country] => US [patent_app_date] => 2011-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4644 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20110127530.pdf [firstpage_image] =>[orig_patent_app_number] => 13025011 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/025011
Semiconductor integrated circuit device Feb 9, 2011 Issued
Array ( [id] => 7511019 [patent_doc_number] => 20110256729 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-20 [patent_title] => 'Showerhead for CVD Depositions' [patent_app_type] => utility [patent_app_number] => 13/025035 [patent_app_country] => US [patent_app_date] => 2011-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2786 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0256/20110256729.pdf [firstpage_image] =>[orig_patent_app_number] => 13025035 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/025035
Showerhead for CVD depositions Feb 9, 2011 Issued
Array ( [id] => 8028131 [patent_doc_number] => 08143147 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-03-27 [patent_title] => 'Methods and systems for forming thin films' [patent_app_type] => utility [patent_app_number] => 13/025046 [patent_app_country] => US [patent_app_date] => 2011-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 10575 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/143/08143147.pdf [firstpage_image] =>[orig_patent_app_number] => 13025046 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/025046
Methods and systems for forming thin films Feb 9, 2011 Issued
Array ( [id] => 9626992 [patent_doc_number] => 08796674 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-05 [patent_title] => 'Method of manufacturing organic electronic device, and organic electronic device' [patent_app_type] => utility [patent_app_number] => 13/578671 [patent_app_country] => US [patent_app_date] => 2011-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 18749 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13578671 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/578671
Method of manufacturing organic electronic device, and organic electronic device Feb 6, 2011 Issued
Array ( [id] => 6213020 [patent_doc_number] => 20110136320 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-09 [patent_title] => 'METHOD OF MANUFACTURING SOI SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/019626 [patent_app_country] => US [patent_app_date] => 2011-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 16227 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0136/20110136320.pdf [firstpage_image] =>[orig_patent_app_number] => 13019626 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/019626
Method of manufacturing SOI substrate Feb 1, 2011 Issued
Array ( [id] => 6143607 [patent_doc_number] => 20110129967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'THREE-TERMINAL POWER DEVICE WITH HIGH SWITCHING SPEED AND MANUFACTURING PROCESS' [patent_app_type] => utility [patent_app_number] => 13/017982 [patent_app_country] => US [patent_app_date] => 2011-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3890 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0129/20110129967.pdf [firstpage_image] =>[orig_patent_app_number] => 13017982 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/017982
Three-terminal power device with high switching speed and manufacturing process Jan 30, 2011 Issued
Array ( [id] => 10106680 [patent_doc_number] => 09142463 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-22 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/516102 [patent_app_country] => US [patent_app_date] => 2011-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 32 [patent_no_of_words] => 12915 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13516102 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/516102
Semiconductor device Jan 27, 2011 Issued
Array ( [id] => 7791059 [patent_doc_number] => 20120052615 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-01 [patent_title] => 'METHOD AND STRUCTURE FOR REDUCING DARK CURRENT IN A CMOS IMAGE SENSOR' [patent_app_type] => utility [patent_app_number] => 13/011819 [patent_app_country] => US [patent_app_date] => 2011-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3568 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20120052615.pdf [firstpage_image] =>[orig_patent_app_number] => 13011819 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/011819
METHOD AND STRUCTURE FOR REDUCING DARK CURRENT IN A CMOS IMAGE SENSOR Jan 20, 2011 Abandoned
Array ( [id] => 8328480 [patent_doc_number] => 08236577 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-08-07 [patent_title] => 'Foundry compatible process for manufacturing a magneto meter using lorentz force for integrated systems' [patent_app_type] => utility [patent_app_number] => 13/007574 [patent_app_country] => US [patent_app_date] => 2011-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 25 [patent_no_of_words] => 13971 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13007574 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/007574
Foundry compatible process for manufacturing a magneto meter using lorentz force for integrated systems Jan 13, 2011 Issued
Array ( [id] => 7796365 [patent_doc_number] => 08125073 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-28 [patent_title] => 'Wafer integrated with permanent carrier and method therefor' [patent_app_type] => utility [patent_app_number] => 13/004111 [patent_app_country] => US [patent_app_date] => 2011-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 4497 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/125/08125073.pdf [firstpage_image] =>[orig_patent_app_number] => 13004111 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/004111
Wafer integrated with permanent carrier and method therefor Jan 10, 2011 Issued
Array ( [id] => 8210224 [patent_doc_number] => 20120129314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-24 [patent_title] => 'METHOD AND RESULTING STRUCTURE FOR DEEP TRENCH POLYSILICON HARD MASK REMOVAL' [patent_app_type] => utility [patent_app_number] => 12/960357 [patent_app_country] => US [patent_app_date] => 2010-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2971 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0129/20120129314.pdf [firstpage_image] =>[orig_patent_app_number] => 12960357 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/960357
Method and resulting structure for deep trench polysilicon hard mask removal Dec 2, 2010 Issued
Array ( [id] => 6021207 [patent_doc_number] => 20110049533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-03 [patent_title] => 'SEMICONDUCTOR DEVICE AND PRODUCTION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/916953 [patent_app_country] => US [patent_app_date] => 2010-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 15055 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20110049533.pdf [firstpage_image] =>[orig_patent_app_number] => 12916953 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/916953
Semiconductor device and production method thereof Oct 31, 2010 Issued
Array ( [id] => 8647943 [patent_doc_number] => 20130033673 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-07 [patent_title] => 'METHOD AND APPARATUS FOR TESTING OPERATION OF AN OPTICAL LIQUID CRYSTAL DEVICE' [patent_app_type] => utility [patent_app_number] => 13/504529 [patent_app_country] => US [patent_app_date] => 2010-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 43 [patent_no_of_words] => 11923 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13504529 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/504529
Method and apparatus for testing operation of an optical liquid crystal device Oct 26, 2010 Issued
Array ( [id] => 8134079 [patent_doc_number] => 20120091595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-19 [patent_title] => 'Layered Integrated Circuit Apparatus' [patent_app_type] => utility [patent_app_number] => 12/906791 [patent_app_country] => US [patent_app_date] => 2010-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2045 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0091/20120091595.pdf [firstpage_image] =>[orig_patent_app_number] => 12906791 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/906791
Layered Integrated Circuit Apparatus Oct 17, 2010 Abandoned
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