Cam N Nguyen
Examiner (ID: 5643, Phone: (571)272-1357 , Office: P/1736 )
Most Active Art Unit | 1736 |
Art Unit(s) | 1736, 1793, 1754 |
Total Applications | 2328 |
Issued Applications | 1758 |
Pending Applications | 181 |
Abandoned Applications | 389 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 6485151
[patent_doc_number] => 20100258951
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-10-14
[patent_title] => 'ASSEMBLING SUBSTRATES THAT CAN FORM 3-D STRUCTURES'
[patent_app_type] => utility
[patent_app_number] => 12/825380
[patent_app_country] => US
[patent_app_date] => 2010-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 66
[patent_figures_cnt] => 66
[patent_no_of_words] => 36244
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0258/20100258951.pdf
[firstpage_image] =>[orig_patent_app_number] => 12825380
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/825380 | Assembling substrates that can form 3-D structures | Jun 28, 2010 | Issued |
Array
(
[id] => 8189031
[patent_doc_number] => 08183088
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-05-22
[patent_title] => 'Semiconductor die package and method for making the same'
[patent_app_type] => utility
[patent_app_number] => 12/823411
[patent_app_country] => US
[patent_app_date] => 2010-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 33
[patent_figures_cnt] => 125
[patent_no_of_words] => 21072
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 45
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/183/08183088.pdf
[firstpage_image] =>[orig_patent_app_number] => 12823411
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/823411 | Semiconductor die package and method for making the same | Jun 24, 2010 | Issued |
Array
(
[id] => 6149365
[patent_doc_number] => 20110020960
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-01-27
[patent_title] => 'METHOD FOR FABRICATING MICRO AND NANOSTRUCTURES IN A MATERIAL'
[patent_app_type] => utility
[patent_app_number] => 12/824128
[patent_app_country] => US
[patent_app_date] => 2010-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 8707
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0020/20110020960.pdf
[firstpage_image] =>[orig_patent_app_number] => 12824128
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/824128 | Method for fabricating micro and nanostructures in a material | Jun 24, 2010 | Issued |
Array
(
[id] => 6569440
[patent_doc_number] => 20100306979
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-12-09
[patent_title] => 'ELECTRODE STACK FOR CAPACITIVE DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/797337
[patent_app_country] => US
[patent_app_date] => 2010-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4138
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0306/20100306979.pdf
[firstpage_image] =>[orig_patent_app_number] => 12797337
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/797337 | Electrode stack for capacitive device | Jun 8, 2010 | Issued |
Array
(
[id] => 8457966
[patent_doc_number] => 08293633
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-10-23
[patent_title] => 'Method of manufacturing nonvolatile memory device'
[patent_app_type] => utility
[patent_app_number] => 12/793215
[patent_app_country] => US
[patent_app_date] => 2010-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 6
[patent_no_of_words] => 3848
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12793215
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/793215 | Method of manufacturing nonvolatile memory device | Jun 2, 2010 | Issued |
Array
(
[id] => 6348399
[patent_doc_number] => 20100330764
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-12-30
[patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/793216
[patent_app_country] => US
[patent_app_date] => 2010-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 28
[patent_no_of_words] => 13115
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0330/20100330764.pdf
[firstpage_image] =>[orig_patent_app_number] => 12793216
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/793216 | Method for manufacturing semiconductor device | Jun 2, 2010 | Issued |
Array
(
[id] => 10843802
[patent_doc_number] => 08870973
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-10-28
[patent_title] => 'Method and apparatus for a capacitor shell including two mateable cupped components'
[patent_app_type] => utility
[patent_app_number] => 12/786168
[patent_app_country] => US
[patent_app_date] => 2010-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 11
[patent_no_of_words] => 5420
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12786168
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/786168 | Method and apparatus for a capacitor shell including two mateable cupped components | May 23, 2010 | Issued |
Array
(
[id] => 10851628
[patent_doc_number] => 08878313
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-11-04
[patent_title] => 'Pressure sensor'
[patent_app_type] => utility
[patent_app_number] => 13/321373
[patent_app_country] => US
[patent_app_date] => 2010-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 6035
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 435
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13321373
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/321373 | Pressure sensor | May 19, 2010 | Issued |
Array
(
[id] => 6540667
[patent_doc_number] => 20100221896
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-02
[patent_title] => 'Electrical Device with Improved Electrode Surface'
[patent_app_type] => utility
[patent_app_number] => 12/781362
[patent_app_country] => US
[patent_app_date] => 2010-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 11406
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0221/20100221896.pdf
[firstpage_image] =>[orig_patent_app_number] => 12781362
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/781362 | Electrical Device with Improved Electrode Surface | May 16, 2010 | Abandoned |
Array
(
[id] => 7558934
[patent_doc_number] => 20110272765
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-11-10
[patent_title] => 'MOSFET GATE AND SOURCE/DRAIN CONTACT METALLIZATION'
[patent_app_type] => utility
[patent_app_number] => 12/776369
[patent_app_country] => US
[patent_app_date] => 2010-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 3748
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0272/20110272765.pdf
[firstpage_image] =>[orig_patent_app_number] => 12776369
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/776369 | MOSFET gate and source/drain contact metallization | May 7, 2010 | Issued |
Array
(
[id] => 8200588
[patent_doc_number] => 08187907
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-05-29
[patent_title] => 'Solder structures for fabrication of inverted metamorphic multijunction solar cells'
[patent_app_type] => utility
[patent_app_number] => 12/775946
[patent_app_country] => US
[patent_app_date] => 2010-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 54
[patent_figures_cnt] => 54
[patent_no_of_words] => 13004
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/187/08187907.pdf
[firstpage_image] =>[orig_patent_app_number] => 12775946
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/775946 | Solder structures for fabrication of inverted metamorphic multijunction solar cells | May 6, 2010 | Issued |
Array
(
[id] => 9523959
[patent_doc_number] => 08748222
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-06-10
[patent_title] => 'Method for forming oxide thin film transistor'
[patent_app_type] => utility
[patent_app_number] => 12/774562
[patent_app_country] => US
[patent_app_date] => 2010-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 14
[patent_no_of_words] => 3238
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12774562
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/774562 | Method for forming oxide thin film transistor | May 4, 2010 | Issued |
Array
(
[id] => 6514503
[patent_doc_number] => 20100220042
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-02
[patent_title] => 'Quantum Photonic Imagers and Methods of Fabrication Thereof'
[patent_app_type] => utility
[patent_app_number] => 12/728069
[patent_app_country] => US
[patent_app_date] => 2010-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 36
[patent_figures_cnt] => 36
[patent_no_of_words] => 21329
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0220/20100220042.pdf
[firstpage_image] =>[orig_patent_app_number] => 12728069
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/728069 | Quantum photonic imagers and methods of fabrication thereof | Mar 18, 2010 | Issued |
Array
(
[id] => 9710726
[patent_doc_number] => 08835294
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-09-16
[patent_title] => 'Method for improving thermal stability of metal gate'
[patent_app_type] => utility
[patent_app_number] => 12/724984
[patent_app_country] => US
[patent_app_date] => 2010-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 3948
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12724984
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/724984 | Method for improving thermal stability of metal gate | Mar 15, 2010 | Issued |
Array
(
[id] => 6604545
[patent_doc_number] => 20100171126
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-08
[patent_title] => 'In situ dopant implantation and growth of a Ill-nitride semiconductor body'
[patent_app_type] => utility
[patent_app_number] => 12/661342
[patent_app_country] => US
[patent_app_date] => 2010-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3677
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0171/20100171126.pdf
[firstpage_image] =>[orig_patent_app_number] => 12661342
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/661342 | In situ dopant implantation and growth of a III-nitride semiconductor body | Mar 15, 2010 | Issued |
Array
(
[id] => 7712098
[patent_doc_number] => 08093143
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-01-10
[patent_title] => 'Method for producing a wafer comprising a silicon single crystal substrate having a front and a back side and a layer of SiGe deposited on the front side'
[patent_app_type] => utility
[patent_app_number] => 12/724584
[patent_app_country] => US
[patent_app_date] => 2010-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 3349
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/093/08093143.pdf
[firstpage_image] =>[orig_patent_app_number] => 12724584
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/724584 | Method for producing a wafer comprising a silicon single crystal substrate having a front and a back side and a layer of SiGe deposited on the front side | Mar 15, 2010 | Issued |
Array
(
[id] => 6561034
[patent_doc_number] => 20100233869
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-16
[patent_title] => 'METHOD OF FABRICATING EPI-WAFER, EPI-WAFER FABRICATED BY THE METHOD, AND IMAGE SENSOR FABRICATED USING THE EPI-WAFER'
[patent_app_type] => utility
[patent_app_number] => 12/723882
[patent_app_country] => US
[patent_app_date] => 2010-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 8250
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0233/20100233869.pdf
[firstpage_image] =>[orig_patent_app_number] => 12723882
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/723882 | Method of fabricating epi-wafer, epi-wafer fabricated by the method, and image sensor fabricated using the epi-wafer | Mar 14, 2010 | Issued |
Array
(
[id] => 6273843
[patent_doc_number] => 20100255657
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-10-07
[patent_title] => 'WAFER PROCESSING METHOD'
[patent_app_type] => utility
[patent_app_number] => 12/722744
[patent_app_country] => US
[patent_app_date] => 2010-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 3572
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0255/20100255657.pdf
[firstpage_image] =>[orig_patent_app_number] => 12722744
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/722744 | Wafer processing method | Mar 11, 2010 | Issued |
Array
(
[id] => 6512174
[patent_doc_number] => 20100261309
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-10-14
[patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/722762
[patent_app_country] => US
[patent_app_date] => 2010-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 5013
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0261/20100261309.pdf
[firstpage_image] =>[orig_patent_app_number] => 12722762
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/722762 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | Mar 11, 2010 | Abandoned |
Array
(
[id] => 6345649
[patent_doc_number] => 20100248483
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-30
[patent_title] => 'METHOD OF PRODUCING SEMICONDUCTOR ELEMENT'
[patent_app_type] => utility
[patent_app_number] => 12/721854
[patent_app_country] => US
[patent_app_date] => 2010-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 4893
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0248/20100248483.pdf
[firstpage_image] =>[orig_patent_app_number] => 12721854
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/721854 | Method of producing semiconductor element | Mar 10, 2010 | Issued |