
Candace L. Bradford
Examiner (ID: 2912, Phone: (571)272-8967 , Office: P/3634 )
| Most Active Art Unit | 3634 |
| Art Unit(s) | 3634 |
| Total Applications | 768 |
| Issued Applications | 351 |
| Pending Applications | 12 |
| Abandoned Applications | 409 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4059507
[patent_doc_number] => 05875460
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-02-23
[patent_title] => 'Disk array subsystem and data generation method therefor'
[patent_app_type] => 1
[patent_app_number] => 8/975503
[patent_app_country] => US
[patent_app_date] => 1997-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3161
[patent_no_of_claims] => 12
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[patent_words_short_claim] => 202
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/875/05875460.pdf
[firstpage_image] =>[orig_patent_app_number] => 975503
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/975503 | Disk array subsystem and data generation method therefor | Nov 20, 1997 | Issued |
Array
(
[id] => 3815852
[patent_doc_number] => 05829036
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-27
[patent_title] => 'Method for providing and operating upgradeable cache circuitry'
[patent_app_type] => 1
[patent_app_number] => 8/961698
[patent_app_country] => US
[patent_app_date] => 1997-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3108
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 217
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/829/05829036.pdf
[firstpage_image] =>[orig_patent_app_number] => 961698
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/961698 | Method for providing and operating upgradeable cache circuitry | Oct 30, 1997 | Issued |
Array
(
[id] => 4011381
[patent_doc_number] => 05893146
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-04-06
[patent_title] => 'Cache structure having a reduced tag comparison to enable data transfer from said cache'
[patent_app_type] => 1
[patent_app_number] => 8/935531
[patent_app_country] => US
[patent_app_date] => 1997-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 7142
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/893/05893146.pdf
[firstpage_image] =>[orig_patent_app_number] => 935531
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/935531 | Cache structure having a reduced tag comparison to enable data transfer from said cache | Sep 22, 1997 | Issued |
Array
(
[id] => 4012685
[patent_doc_number] => 05859635
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-01-12
[patent_title] => 'Polarity synchronization method and apparatus for video signals in a computer system'
[patent_app_type] => 1
[patent_app_number] => 8/922524
[patent_app_country] => US
[patent_app_date] => 1997-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3854
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/859/05859635.pdf
[firstpage_image] =>[orig_patent_app_number] => 922524
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/922524 | Polarity synchronization method and apparatus for video signals in a computer system | Sep 2, 1997 | Issued |
Array
(
[id] => 3913464
[patent_doc_number] => 05835955
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-10
[patent_title] => 'Disk array controller with enhanced synchronous write'
[patent_app_type] => 1
[patent_app_number] => 8/918782
[patent_app_country] => US
[patent_app_date] => 1997-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3278
[patent_no_of_claims] => 8
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/835/05835955.pdf
[firstpage_image] =>[orig_patent_app_number] => 918782
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/918782 | Disk array controller with enhanced synchronous write | Aug 24, 1997 | Issued |
Array
(
[id] => 3806119
[patent_doc_number] => 05737762
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-07
[patent_title] => 'Data recording/reproducing system capable of processing servo process program at high speed'
[patent_app_type] => 1
[patent_app_number] => 8/877245
[patent_app_country] => US
[patent_app_date] => 1997-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 6816
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/737/05737762.pdf
[firstpage_image] =>[orig_patent_app_number] => 877245
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/877245 | Data recording/reproducing system capable of processing servo process program at high speed | Jun 16, 1997 | Issued |
Array
(
[id] => 3765729
[patent_doc_number] => 05802588
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-01
[patent_title] => 'Load/store unit implementing non-blocking loads for a superscalar microprocessor and method of selecting loads in a non-blocking fashion from a load/store buffer'
[patent_app_type] => 1
[patent_app_number] => 8/858583
[patent_app_country] => US
[patent_app_date] => 1997-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 10242
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/802/05802588.pdf
[firstpage_image] =>[orig_patent_app_number] => 858583
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/858583 | Load/store unit implementing non-blocking loads for a superscalar microprocessor and method of selecting loads in a non-blocking fashion from a load/store buffer | May 18, 1997 | Issued |
Array
(
[id] => 3922908
[patent_doc_number] => 05752270
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-12
[patent_title] => 'Method of executing read and write operations in a synchronous random access memory'
[patent_app_type] => 1
[patent_app_number] => 8/846206
[patent_app_country] => US
[patent_app_date] => 1997-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 33
[patent_no_of_words] => 10036
[patent_no_of_claims] => 3
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[patent_words_short_claim] => 216
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/752/05752270.pdf
[firstpage_image] =>[orig_patent_app_number] => 846206
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/846206 | Method of executing read and write operations in a synchronous random access memory | Apr 27, 1997 | Issued |
Array
(
[id] => 3872169
[patent_doc_number] => 05768547
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-16
[patent_title] => 'Multiple segmenting of main memory to streamline data paths in a computing system'
[patent_app_type] => 1
[patent_app_number] => 8/839205
[patent_app_country] => US
[patent_app_date] => 1997-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 3771
[patent_no_of_claims] => 20
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[pdf_file] => patents/05/768/05768547.pdf
[firstpage_image] =>[orig_patent_app_number] => 839205
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/839205 | Multiple segmenting of main memory to streamline data paths in a computing system | Apr 22, 1997 | Issued |
Array
(
[id] => 3815908
[patent_doc_number] => 05829040
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-27
[patent_title] => 'Snooper circuit of a multi-processor system'
[patent_app_type] => 1
[patent_app_number] => 8/839346
[patent_app_country] => US
[patent_app_date] => 1997-04-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4012
[patent_no_of_claims] => 4
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[pdf_file] => patents/05/829/05829040.pdf
[firstpage_image] =>[orig_patent_app_number] => 839346
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/839346 | Snooper circuit of a multi-processor system | Apr 17, 1997 | Issued |
Array
(
[id] => 3871567
[patent_doc_number] => 05768508
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-16
[patent_title] => 'Computer network system and method for efficient information transfer'
[patent_app_type] => 1
[patent_app_number] => 8/832687
[patent_app_country] => US
[patent_app_date] => 1997-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[patent_no_of_words] => 4062
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[pdf_file] => patents/05/768/05768508.pdf
[firstpage_image] =>[orig_patent_app_number] => 832687
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/832687 | Computer network system and method for efficient information transfer | Apr 10, 1997 | Issued |
Array
(
[id] => 4019333
[patent_doc_number] => 05860083
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-01-12
[patent_title] => 'Data storage system having flash memory and disk drive'
[patent_app_type] => 1
[patent_app_number] => 8/818983
[patent_app_country] => US
[patent_app_date] => 1997-03-14
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[pdf_file] => patents/05/860/05860083.pdf
[firstpage_image] =>[orig_patent_app_number] => 818983
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/818983 | Data storage system having flash memory and disk drive | Mar 13, 1997 | Issued |
Array
(
[id] => 3833558
[patent_doc_number] => 05813042
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-22
[patent_title] => 'Methods and systems for control of memory'
[patent_app_type] => 1
[patent_app_number] => 8/802599
[patent_app_country] => US
[patent_app_date] => 1997-02-19
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[pdf_file] => patents/05/813/05813042.pdf
[firstpage_image] =>[orig_patent_app_number] => 802599
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/802599 | Methods and systems for control of memory | Feb 18, 1997 | Issued |
Array
(
[id] => 3806011
[patent_doc_number] => 05737755
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-07
[patent_title] => 'System level mechanism for invalidating data stored in the external cache of a processor in a computer system'
[patent_app_type] => 1
[patent_app_number] => 8/797995
[patent_app_country] => US
[patent_app_date] => 1997-02-12
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/737/05737755.pdf
[firstpage_image] =>[orig_patent_app_number] => 797995
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/797995 | System level mechanism for invalidating data stored in the external cache of a processor in a computer system | Feb 11, 1997 | Issued |
| 08/778542 | DATA RECORDING/REPRODUCING SYSTEM CAPABLE OF PROCESSING SERVO PROCESS PROGRAM AT HIGH SPEED | Jan 2, 1997 | Abandoned |
Array
(
[id] => 3830144
[patent_doc_number] => 05812817
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-22
[patent_title] => 'Compression architecture for system memory application'
[patent_app_type] => 1
[patent_app_number] => 8/777738
[patent_app_country] => US
[patent_app_date] => 1996-12-20
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 777738
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/777738 | Compression architecture for system memory application | Dec 19, 1996 | Issued |
Array
(
[id] => 4027005
[patent_doc_number] => 05890208
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-30
[patent_title] => 'Command executing method for CD-ROM disk drive'
[patent_app_type] => 1
[patent_app_number] => 8/759954
[patent_app_country] => US
[patent_app_date] => 1996-12-03
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/890/05890208.pdf
[firstpage_image] =>[orig_patent_app_number] => 759954
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/759954 | Command executing method for CD-ROM disk drive | Dec 2, 1996 | Issued |
Array
(
[id] => 3954548
[patent_doc_number] => 05873116
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-02-16
[patent_title] => 'Method and apparatus for controlling access to data structures without the use of locks'
[patent_app_type] => 1
[patent_app_number] => 8/754352
[patent_app_country] => US
[patent_app_date] => 1996-11-22
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[pdf_file] => patents/05/873/05873116.pdf
[firstpage_image] =>[orig_patent_app_number] => 754352
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/754352 | Method and apparatus for controlling access to data structures without the use of locks | Nov 21, 1996 | Issued |
Array
(
[id] => 4011323
[patent_doc_number] => 05893142
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-04-06
[patent_title] => 'Data processing system having a cache and method therefor'
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[pdf_file] => patents/05/893/05893142.pdf
[firstpage_image] =>[orig_patent_app_number] => 748855
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/748855 | Data processing system having a cache and method therefor | Nov 13, 1996 | Issued |
Array
(
[id] => 4019913
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[patent_kind] => NA
[patent_issue_date] => 1999-01-12
[patent_title] => 'Backup unit including identifier conversion means'
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[patent_app_number] => 8/747601
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[pdf_file] => patents/05/860/05860122.pdf
[firstpage_image] =>[orig_patent_app_number] => 747601
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/747601 | Backup unit including identifier conversion means | Nov 11, 1996 | Issued |