Search

Candice Chan

Examiner (ID: 15581, Phone: (571)272-9013 , Office: P/2813 )

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
742
Issued Applications
487
Pending Applications
88
Abandoned Applications
187

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17232479 [patent_doc_number] => 20210359036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => LIGHT EMITTING DIODE AND FABRICATING METHOD THEREOF, DISPLAY SUSBSTRATE, AND DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 16/484631 [patent_app_country] => US [patent_app_date] => 2018-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5790 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16484631 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/484631
Light emitting diode with microcavities and different reflective layers and fabricating method thereof, display substrate, and display apparatus Sep 18, 2018 Issued
Array ( [id] => 16521758 [patent_doc_number] => 10872984 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-22 [patent_title] => Thin film transistor having channel regions, array substrate, manufacturing method thereof and display device comprising the same [patent_app_type] => utility [patent_app_number] => 16/135511 [patent_app_country] => US [patent_app_date] => 2018-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 9539 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16135511 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/135511
Thin film transistor having channel regions, array substrate, manufacturing method thereof and display device comprising the same Sep 18, 2018 Issued
Array ( [id] => 14904713 [patent_doc_number] => 20190296122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/134314 [patent_app_country] => US [patent_app_date] => 2018-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11040 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16134314 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/134314
Semiconductor memory device Sep 17, 2018 Issued
Array ( [id] => 14079595 [patent_doc_number] => 20190088685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => FLEXIBLE ARRAY SUBSTRATE, PREPARATION METHOD THEREOF, AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/133313 [patent_app_country] => US [patent_app_date] => 2018-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7793 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16133313 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/133313
Flexible array substrate, with protection layer, preparation method thereof, and display device Sep 16, 2018 Issued
Array ( [id] => 16774105 [patent_doc_number] => 10985228 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-20 [patent_title] => Flexible display panel with reinforced insulating layer, method of manufacturing flexible display panel, and flexible display apparatus [patent_app_type] => utility [patent_app_number] => 16/133453 [patent_app_country] => US [patent_app_date] => 2018-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 6756 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16133453 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/133453
Flexible display panel with reinforced insulating layer, method of manufacturing flexible display panel, and flexible display apparatus Sep 16, 2018 Issued
Array ( [id] => 14110477 [patent_doc_number] => 20190096914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/132908 [patent_app_country] => US [patent_app_date] => 2018-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4962 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16132908 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/132908
Display device having a scanning circuit disposed along an edge of a substrate and scan lines connected to the scanning circuit Sep 16, 2018 Issued
Array ( [id] => 15045879 [patent_doc_number] => 20190333944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => LTPS TYPE TFT AND METHOD FOR MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 16/086019 [patent_app_country] => US [patent_app_date] => 2018-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5621 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16086019 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/086019
Method for manufacturing LTPS type TFT Aug 6, 2018 Issued
Array ( [id] => 15045881 [patent_doc_number] => 20190333945 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/086041 [patent_app_country] => US [patent_app_date] => 2018-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5311 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16086041 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/086041
Manufacturing method of array substrate Jul 31, 2018 Issued
Array ( [id] => 13630057 [patent_doc_number] => 20180366581 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-20 [patent_title] => Semiconductor Device and Method [patent_app_type] => utility [patent_app_number] => 16/049518 [patent_app_country] => US [patent_app_date] => 2018-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10844 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16049518 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/049518
Semiconductor device having a shaped epitaxial region Jul 29, 2018 Issued
Array ( [id] => 18137370 [patent_doc_number] => 11563059 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-24 [patent_title] => Display substrate having auxiliary electrode layer electrically connected to first electrode display apparatus, and method of fabricating display substrate [patent_app_type] => utility [patent_app_number] => 16/330561 [patent_app_country] => US [patent_app_date] => 2018-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 8111 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16330561 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/330561
Display substrate having auxiliary electrode layer electrically connected to first electrode display apparatus, and method of fabricating display substrate Jul 26, 2018 Issued
Array ( [id] => 13582119 [patent_doc_number] => 20180342608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-29 [patent_title] => Power MOSFET Having Improved Manufacturability, Low On-Resistance and High Breakdown Voltage [patent_app_type] => utility [patent_app_number] => 16/035566 [patent_app_country] => US [patent_app_date] => 2018-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6232 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16035566 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/035566
Power MOSFET Having Improved Manufacturability, Low On-Resistance and High Breakdown Voltage Jul 12, 2018 Abandoned
Array ( [id] => 13471029 [patent_doc_number] => 20180287057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-04 [patent_title] => Resistive Memory Cell With Sloped Bottom Electrode [patent_app_type] => utility [patent_app_number] => 16/001332 [patent_app_country] => US [patent_app_date] => 2018-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8015 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16001332 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/001332
Resistive Memory Cell With Sloped Bottom Electrode Jun 5, 2018 Abandoned
Array ( [id] => 13878859 [patent_doc_number] => 20190035770 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => SEMICONDUCTOR DEVICE AND SEMICONDUCTOR ELEMENT [patent_app_type] => utility [patent_app_number] => 15/984481 [patent_app_country] => US [patent_app_date] => 2018-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9968 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15984481 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/984481
Semiconductor device and semiconductor element with improved yield May 20, 2018 Issued
Array ( [id] => 15154347 [patent_doc_number] => 20190355651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => TWO SIDED BONDABLE LEAD FRAME [patent_app_type] => utility [patent_app_number] => 15/985380 [patent_app_country] => US [patent_app_date] => 2018-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2878 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15985380 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/985380
TWO SIDED BONDABLE LEAD FRAME May 20, 2018 Abandoned
Array ( [id] => 15154345 [patent_doc_number] => 20190355650 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => SEMICONDUCTOR PACKAGE WITH CONTINUOUS LEAD FRAME [patent_app_type] => utility [patent_app_number] => 15/984232 [patent_app_country] => US [patent_app_date] => 2018-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6358 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15984232 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/984232
SEMICONDUCTOR PACKAGE WITH CONTINUOUS LEAD FRAME May 17, 2018 Abandoned
Array ( [id] => 15154341 [patent_doc_number] => 20190355648 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => SEMICONDUCTOR POWER DEVICE INCLUDING RING FRAME FOR THERMAL IMPEDANCE REDUCTION [patent_app_type] => utility [patent_app_number] => 15/984271 [patent_app_country] => US [patent_app_date] => 2018-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8447 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15984271 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/984271
Semiconductor power device including ring frame for thermal impedance reduction May 17, 2018 Issued
Array ( [id] => 15922007 [patent_doc_number] => 10658251 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Process of forming semiconductor substrate by use of normalized reflectivity [patent_app_type] => utility [patent_app_number] => 15/982125 [patent_app_country] => US [patent_app_date] => 2018-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 4785 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15982125 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/982125
Process of forming semiconductor substrate by use of normalized reflectivity May 16, 2018 Issued
Array ( [id] => 16383042 [patent_doc_number] => 10807863 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-20 [patent_title] => Method for manufacturing micromechanical structures in a device wafer [patent_app_type] => utility [patent_app_number] => 15/981327 [patent_app_country] => US [patent_app_date] => 2018-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 8521 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 315 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15981327 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/981327
Method for manufacturing micromechanical structures in a device wafer May 15, 2018 Issued
Array ( [id] => 14769195 [patent_doc_number] => 10395999 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-08-27 [patent_title] => Method for monitoring fin removal [patent_app_type] => utility [patent_app_number] => 15/981053 [patent_app_country] => US [patent_app_date] => 2018-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 4152 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15981053 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/981053
Method for monitoring fin removal May 15, 2018 Issued
Array ( [id] => 17174395 [patent_doc_number] => 20210328066 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => THIN FILM TRANSISTOR, DISPLAY SUBSTRATE, DISPLAY PANEL, AND METHOD OF FABRICATING A THIN FILM TRANSISTOR [patent_app_type] => utility [patent_app_number] => 16/330860 [patent_app_country] => US [patent_app_date] => 2018-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9576 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16330860 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/330860
THIN FILM TRANSISTOR, DISPLAY SUBSTRATE, DISPLAY PANEL, AND METHOD OF FABRICATING A THIN FILM TRANSISTOR May 2, 2018 Abandoned
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