Search

Candice Chan

Examiner (ID: 15581, Phone: (571)272-9013 , Office: P/2813 )

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
742
Issued Applications
487
Pending Applications
88
Abandoned Applications
187

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11592989 [patent_doc_number] => 20170117401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-27 [patent_title] => 'MISHFET HAVING A COMPARATIVELY HIGH AND SELECTABLE OR CUSTOMIZABLE BREAKDOWN VOLTAGE' [patent_app_type] => utility [patent_app_number] => 15/293529 [patent_app_country] => US [patent_app_date] => 2016-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13308 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15293529 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/293529
MISHFET having a comparatively high and selectable or customizable breakdown voltage Oct 13, 2016 Issued
Array ( [id] => 12061949 [patent_doc_number] => 20170338293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-23 [patent_title] => 'Array Substrate and Method for Fabricating the Same, and Display Apparatus' [patent_app_type] => utility [patent_app_number] => 15/533813 [patent_app_country] => US [patent_app_date] => 2016-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4165 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15533813 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/533813
Array Substrate and Method for Fabricating the Same, and Display Apparatus Oct 12, 2016 Abandoned
Array ( [id] => 12436683 [patent_doc_number] => 09978745 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-22 [patent_title] => Bipolar junction transistor [patent_app_type] => utility [patent_app_number] => 15/289988 [patent_app_country] => US [patent_app_date] => 2016-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5116 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15289988 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/289988
Bipolar junction transistor Oct 10, 2016 Issued
Array ( [id] => 13936583 [patent_doc_number] => 20190051807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-14 [patent_title] => SEMICONDUCTOR DEVICE MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 15/777134 [patent_app_country] => US [patent_app_date] => 2016-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10263 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15777134 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/777134
Semiconductor device manufacturing method Oct 3, 2016 Issued
Array ( [id] => 12122567 [patent_doc_number] => 20180006153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'Semiconductor Device and Method' [patent_app_type] => utility [patent_app_number] => 15/284101 [patent_app_country] => US [patent_app_date] => 2016-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 10397 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15284101 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/284101
Method of manufacturing semiconductor device Oct 2, 2016 Issued
Array ( [id] => 12615195 [patent_doc_number] => 20180096895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-05 [patent_title] => PREVENTING OXIDATION DEFECTS IN STRAIN-RELAXED FINS BY REDUCING LOCAL GAP FILL VOIDS [patent_app_type] => utility [patent_app_number] => 15/284110 [patent_app_country] => US [patent_app_date] => 2016-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3252 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15284110 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/284110
Preventing oxidation defects in strain-relaxed fins by reducing local gap fill voids Oct 2, 2016 Issued
Array ( [id] => 11932824 [patent_doc_number] => 09799828 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-10-24 [patent_title] => 'Topological insulator infrared pseudo-bolometer with polarization sensitivity' [patent_app_type] => utility [patent_app_number] => 15/284102 [patent_app_country] => US [patent_app_date] => 2016-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2456 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15284102 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/284102
Topological insulator infrared pseudo-bolometer with polarization sensitivity Oct 2, 2016 Issued
Array ( [id] => 12954145 [patent_doc_number] => 09837529 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-12-05 [patent_title] => Power MOSFET having improved manufacturability, low on-resistance and high breakdown voltage [patent_app_type] => utility [patent_app_number] => 15/284488 [patent_app_country] => US [patent_app_date] => 2016-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 6132 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 496 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15284488 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/284488
Power MOSFET having improved manufacturability, low on-resistance and high breakdown voltage Oct 2, 2016 Issued
Array ( [id] => 11983698 [patent_doc_number] => 20170287853 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-05 [patent_title] => 'FAN-OUT SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 15/278248 [patent_app_country] => US [patent_app_date] => 2016-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 14956 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15278248 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/278248
Fan-out semiconductor package for packaging semiconductor chip and capacitors Sep 27, 2016 Issued
Array ( [id] => 11517458 [patent_doc_number] => 20170084532 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-23 [patent_title] => 'VERTICAL MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/271605 [patent_app_country] => US [patent_app_date] => 2016-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 11847 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15271605 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/271605
Vertical memory devices and methods of manufacturing the same Sep 20, 2016 Issued
Array ( [id] => 12263744 [patent_doc_number] => 20180082940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-22 [patent_title] => 'METHODS OF FORMING A SEMICONDUCTOR DEVICE STRUCTURE INCLUDING A STAIR STEP STRUCTURE, AND RELATED SEMICONDUCTOR DEVICES' [patent_app_type] => utility [patent_app_number] => 15/271924 [patent_app_country] => US [patent_app_date] => 2016-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10389 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15271924 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/271924
Methods of forming a semiconductor device structure including a stair step structure Sep 20, 2016 Issued
Array ( [id] => 12027053 [patent_doc_number] => 20170317152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'ORGANIC LIGHT EMITTING DIODE ARRAY SUBSTRATE, METHOD FOR MANUFACTURING THE SAME AND DISPLAY WITH THE SAME' [patent_app_type] => utility [patent_app_number] => 15/526710 [patent_app_country] => US [patent_app_date] => 2016-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4959 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15526710 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/526710
Organic light emitting diode array substrate with an organic light emitting layer on a pixel electrode layer and an electrode layer on the organic light emitting layer, method for manufacturing the same and display with the same Aug 30, 2016 Issued
Array ( [id] => 11328380 [patent_doc_number] => 20160358992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-08 [patent_title] => 'Organic Light Emitting Display Device and Method for Manufacturing the Same' [patent_app_type] => utility [patent_app_number] => 15/241966 [patent_app_country] => US [patent_app_date] => 2016-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 12650 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15241966 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/241966
Organic light emitting display device and method for manufacturing the same Aug 18, 2016 Issued
Array ( [id] => 11293730 [patent_doc_number] => 20160343662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-24 [patent_title] => 'SEMICONDUCTOR STRUCTURE AND METHOD FOR MAKING SAME' [patent_app_type] => utility [patent_app_number] => 15/223851 [patent_app_country] => US [patent_app_date] => 2016-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5689 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15223851 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/223851
SEMICONDUCTOR STRUCTURE AND METHOD FOR MAKING SAME Jul 28, 2016 Abandoned
Array ( [id] => 13335215 [patent_doc_number] => 20180219145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-02 [patent_title] => METHOD FOR PRODUCING A COMPONENT AND COMPONENT [patent_app_type] => utility [patent_app_number] => 15/747447 [patent_app_country] => US [patent_app_date] => 2016-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7919 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15747447 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/747447
Housing comprising a semiconductor body and a method for producing a housing with a semiconductor body Jul 19, 2016 Issued
Array ( [id] => 12109325 [patent_doc_number] => 09865814 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-09 [patent_title] => 'Resistive memory cell having a single bottom electrode and two top electrodes' [patent_app_type] => utility [patent_app_number] => 15/200322 [patent_app_country] => US [patent_app_date] => 2016-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 4044 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15200322 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/200322
Resistive memory cell having a single bottom electrode and two top electrodes Jun 30, 2016 Issued
Array ( [id] => 12102112 [patent_doc_number] => 09859211 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-02 [patent_title] => 'Nonvolatile semiconductor memory device including pillars buried inside through holes' [patent_app_type] => utility [patent_app_number] => 15/190921 [patent_app_country] => US [patent_app_date] => 2016-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 7114 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15190921 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/190921
Nonvolatile semiconductor memory device including pillars buried inside through holes Jun 22, 2016 Issued
Array ( [id] => 11015903 [patent_doc_number] => 20160212856 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-21 [patent_title] => 'METHOD FOR MANUFACTURING ELECTRONIC COMPONENT EMBEDDING SUBSTRATE AND ELECTRONIC COMPONENT EMBEDDING SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 15/081108 [patent_app_country] => US [patent_app_date] => 2016-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5700 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15081108 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/081108
METHOD FOR MANUFACTURING ELECTRONIC COMPONENT EMBEDDING SUBSTRATE AND ELECTRONIC COMPONENT EMBEDDING SUBSTRATE Mar 24, 2016 Abandoned
Array ( [id] => 12230001 [patent_doc_number] => 09917251 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-13 [patent_title] => 'Resistive memory cell having a reduced conductive path area' [patent_app_type] => utility [patent_app_number] => 15/065354 [patent_app_country] => US [patent_app_date] => 2016-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 3368 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15065354 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/065354
Resistive memory cell having a reduced conductive path area Mar 8, 2016 Issued
Array ( [id] => 10993495 [patent_doc_number] => 20160190441 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-30 [patent_title] => 'Resistive Memory Cell With Sloped Bottom Electrode' [patent_app_type] => utility [patent_app_number] => 15/065193 [patent_app_country] => US [patent_app_date] => 2016-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 58 [patent_figures_cnt] => 58 [patent_no_of_words] => 8710 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15065193 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/065193
Resistive Memory Cell With Sloped Bottom Electrode Mar 8, 2016 Abandoned
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