Search

Candice Chan

Examiner (ID: 1009, Phone: (571)272-9013 , Office: P/2813 )

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
707
Issued Applications
472
Pending Applications
80
Abandoned Applications
185

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18020384 [patent_doc_number] => 20220371883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => METHOD FOR PREPARING A MEMS MICRO MIRROR WITH ELCTRODES ON BOTH SIDES [patent_app_type] => utility [patent_app_number] => 17/560164 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8150 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 401 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17560164 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/560164
Method for preparing a MEMS micro mirror with electrodes on both sides Dec 21, 2021 Issued
Array ( [id] => 19926201 [patent_doc_number] => 12300494 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Ion implantation process to form punch through stopper [patent_app_type] => utility [patent_app_number] => 17/548002 [patent_app_country] => US [patent_app_date] => 2021-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17548002 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/548002
Ion implantation process to form punch through stopper Dec 9, 2021 Issued
Array ( [id] => 18366215 [patent_doc_number] => 20230147806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/545996 [patent_app_country] => US [patent_app_date] => 2021-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4117 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17545996 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/545996
SEMICONDUCTOR STRUCTURE AND METHOD OF FABRICATING THE SAME Dec 7, 2021 Pending
Array ( [id] => 19213681 [patent_doc_number] => 12002753 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-04 [patent_title] => Electronic fuse with passive two-terminal phase change material and method of fabrication [patent_app_type] => utility [patent_app_number] => 17/545260 [patent_app_country] => US [patent_app_date] => 2021-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 25 [patent_no_of_words] => 5292 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17545260 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/545260
Electronic fuse with passive two-terminal phase change material and method of fabrication Dec 7, 2021 Issued
Array ( [id] => 18882823 [patent_doc_number] => 20240006192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/255367 [patent_app_country] => US [patent_app_date] => 2021-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8653 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18255367 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/255367
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Dec 2, 2021 Pending
Array ( [id] => 17645281 [patent_doc_number] => 20220173020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => AN ELECTRICAL CONNECTION STRUCTURE AND AN ELECTRONIC DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/539255 [patent_app_country] => US [patent_app_date] => 2021-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3432 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17539255 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/539255
AN ELECTRICAL CONNECTION STRUCTURE AND AN ELECTRONIC DEVICE INCLUDING THE SAME Nov 30, 2021 Pending
Array ( [id] => 17477613 [patent_doc_number] => 20220085117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => LIGHT EMITTING DISPLAY DEVICE INCLUDING CONDUCTIVITY IMPROVEMENT LAYER [patent_app_type] => utility [patent_app_number] => 17/536964 [patent_app_country] => US [patent_app_date] => 2021-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15735 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17536964 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/536964
Light emitting display device including conductivity improvement layer Nov 28, 2021 Issued
Array ( [id] => 19199180 [patent_doc_number] => 11996429 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-28 [patent_title] => CMOS image sensor structure with microstructures on backside surface of semiconductor layer [patent_app_type] => utility [patent_app_number] => 17/525926 [patent_app_country] => US [patent_app_date] => 2021-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 6143 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17525926 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/525926
CMOS image sensor structure with microstructures on backside surface of semiconductor layer Nov 13, 2021 Issued
Array ( [id] => 17402911 [patent_doc_number] => 20220045002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-10 [patent_title] => METHOD FOR PREPARING VERTICAL ELECTRICAL FUSE DEVICE [patent_app_type] => utility [patent_app_number] => 17/508770 [patent_app_country] => US [patent_app_date] => 2021-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8798 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17508770 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/508770
Method for preparing vertical electrical fuse device Oct 21, 2021 Issued
Array ( [id] => 17615719 [patent_doc_number] => 20220157999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/507250 [patent_app_country] => US [patent_app_date] => 2021-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13034 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17507250 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/507250
SEMICONDUCTOR DEVICE Oct 20, 2021 Abandoned
Array ( [id] => 17737998 [patent_doc_number] => 20220223460 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => TRANSFERRING APPARATUS AND METHOD FOR TRANSFERRING ELECTRONIC COMPONENT [patent_app_type] => utility [patent_app_number] => 17/505633 [patent_app_country] => US [patent_app_date] => 2021-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3741 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17505633 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/505633
TRANSFERRING APPARATUS AND METHOD FOR TRANSFERRING ELECTRONIC COMPONENT Oct 19, 2021 Abandoned
Array ( [id] => 17780087 [patent_doc_number] => 20220246437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-04 [patent_title] => METHOD FOR FORMING SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/504636 [patent_app_country] => US [patent_app_date] => 2021-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4790 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17504636 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/504636
Method for forming semiconductor structure Oct 18, 2021 Issued
Array ( [id] => 19277398 [patent_doc_number] => 12027531 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-02 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 17/501014 [patent_app_country] => US [patent_app_date] => 2021-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5022 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17501014 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/501014
Display device Oct 13, 2021 Issued
Array ( [id] => 18312700 [patent_doc_number] => 20230116600 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => BENCHMARK DEVICE ON A SEMICONDUCTOR WAFER WITH FUSE ELEMENT [patent_app_type] => utility [patent_app_number] => 17/499911 [patent_app_country] => US [patent_app_date] => 2021-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5730 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17499911 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/499911
Benchmark device on a semiconductor wafer with fuse element Oct 12, 2021 Issued
Array ( [id] => 18264753 [patent_doc_number] => 20230085995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => SEMICONDUCTOR DEVICE IDENTIFICATION USING PREFORMED RESISTIVE MEMORY [patent_app_type] => utility [patent_app_number] => 17/481842 [patent_app_country] => US [patent_app_date] => 2021-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4648 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17481842 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/481842
Semiconductor device identification using preformed resistive memory Sep 21, 2021 Issued
Array ( [id] => 18296956 [patent_doc_number] => 20230106642 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-06 [patent_title] => EMBEDDED PACKAGE WITH DELAMINATION MITIGATION [patent_app_type] => utility [patent_app_number] => 17/479302 [patent_app_country] => US [patent_app_date] => 2021-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5508 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17479302 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/479302
EMBEDDED PACKAGE WITH DELAMINATION MITIGATION Sep 19, 2021 Pending
Array ( [id] => 18252054 [patent_doc_number] => 20230079093 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => Three-Dimensional Stack NOR Flash Memory [patent_app_type] => utility [patent_app_number] => 17/477040 [patent_app_country] => US [patent_app_date] => 2021-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9252 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17477040 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/477040
Vertical three-dimensional stack NOR flash memory Sep 15, 2021 Issued
Array ( [id] => 19704952 [patent_doc_number] => 12198999 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-14 [patent_title] => Electronic package including a protection layer [patent_app_type] => utility [patent_app_number] => 17/477238 [patent_app_country] => US [patent_app_date] => 2021-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 10633 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17477238 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/477238
Electronic package including a protection layer Sep 15, 2021 Issued
Array ( [id] => 18008723 [patent_doc_number] => 20220367490 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => MIM EFUSE MEMORY DEVICES AND MEMORY ARRAY [patent_app_type] => utility [patent_app_number] => 17/474257 [patent_app_country] => US [patent_app_date] => 2021-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6956 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17474257 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/474257
MIM eFuse memory devices and memory array Sep 13, 2021 Issued
Array ( [id] => 17485884 [patent_doc_number] => 20220093388 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, METHOD OF PROCESSING SUBSTRATE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM [patent_app_type] => utility [patent_app_number] => 17/474705 [patent_app_country] => US [patent_app_date] => 2021-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23151 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17474705 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/474705
Method and apparatus for selective film formation in semiconductor substrate processing Sep 13, 2021 Issued
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