Search

Candice Chan

Examiner (ID: 1009, Phone: (571)272-9013 , Office: P/2813 )

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
707
Issued Applications
472
Pending Applications
80
Abandoned Applications
185

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19370497 [patent_doc_number] => 12062591 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-13 [patent_title] => Power semiconductor module with baseplate and heat dissipating element [patent_app_type] => utility [patent_app_number] => 17/159257 [patent_app_country] => US [patent_app_date] => 2021-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 10182 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17159257 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/159257
Power semiconductor module with baseplate and heat dissipating element Jan 26, 2021 Issued
Array ( [id] => 19007955 [patent_doc_number] => 20240072026 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SAME, AND SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/271849 [patent_app_country] => US [patent_app_date] => 2021-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8337 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18271849 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/271849
SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SAME, AND SEMICONDUCTOR PACKAGE Jan 14, 2021 Pending
Array ( [id] => 16752641 [patent_doc_number] => 20210104653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-08 [patent_title] => HOUSING COMPRISING A SEMICONDUCTOR BODY AND A METHOD FOR PRODUCING A HOUSING WITH A SEMICONDUCTOR BODY [patent_app_type] => utility [patent_app_number] => 17/126125 [patent_app_country] => US [patent_app_date] => 2020-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7943 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17126125 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/126125
HOUSING COMPRISING A SEMICONDUCTOR BODY AND A METHOD FOR PRODUCING A HOUSING WITH A SEMICONDUCTOR BODY Dec 17, 2020 Abandoned
Array ( [id] => 19046723 [patent_doc_number] => 11935843 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Physical unclonable functions with silicon-rich dielectric devices [patent_app_type] => utility [patent_app_number] => 17/112668 [patent_app_country] => US [patent_app_date] => 2020-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 6131 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17112668 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/112668
Physical unclonable functions with silicon-rich dielectric devices Dec 3, 2020 Issued
Array ( [id] => 19138055 [patent_doc_number] => 11973030 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-30 [patent_title] => Layout structure of eFuse unit [patent_app_type] => utility [patent_app_number] => 16/952288 [patent_app_country] => US [patent_app_date] => 2020-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1572 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16952288 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/952288
Layout structure of eFuse unit Nov 18, 2020 Issued
Array ( [id] => 18205628 [patent_doc_number] => 11588036 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-21 [patent_title] => High-efficiency packaged chip structure and electronic device including the same [patent_app_type] => utility [patent_app_number] => 17/095710 [patent_app_country] => US [patent_app_date] => 2020-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5189 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17095710 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/095710
High-efficiency packaged chip structure and electronic device including the same Nov 10, 2020 Issued
Array ( [id] => 17599622 [patent_doc_number] => 20220149196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => GATE TRENCH POWER SEMICONDUCTOR DEVICES HAVING IMPROVED DEEP SHIELD CONNECTION PATTERNS [patent_app_type] => utility [patent_app_number] => 17/092923 [patent_app_country] => US [patent_app_date] => 2020-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15463 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17092923 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/092923
Gate trench power semiconductor devices having improved deep shield connection patterns Nov 8, 2020 Issued
Array ( [id] => 17448235 [patent_doc_number] => 20220068740 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => SEMICONDUCTOR SYSTEM AND METHOD OF FORMING SEMICONDUCTOR SYSTEM [patent_app_type] => utility [patent_app_number] => 17/088621 [patent_app_country] => US [patent_app_date] => 2020-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13161 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17088621 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/088621
SEMICONDUCTOR SYSTEM AND METHOD OF FORMING SEMICONDUCTOR SYSTEM Nov 3, 2020 Abandoned
Array ( [id] => 19294552 [patent_doc_number] => 12033916 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-09 [patent_title] => Semiconductor device and semiconductor module with improved heat dissipation [patent_app_type] => utility [patent_app_number] => 17/078410 [patent_app_country] => US [patent_app_date] => 2020-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 49 [patent_no_of_words] => 8539 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17078410 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/078410
Semiconductor device and semiconductor module with improved heat dissipation Oct 22, 2020 Issued
Array ( [id] => 16625013 [patent_doc_number] => 20210043666 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-11 [patent_title] => IMAGING DEVICE [patent_app_type] => utility [patent_app_number] => 17/077013 [patent_app_country] => US [patent_app_date] => 2020-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7573 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17077013 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/077013
Imaging device Oct 21, 2020 Issued
Array ( [id] => 18061972 [patent_doc_number] => 20220393059 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-08 [patent_title] => Component Composite and Method for Probing and Producing Components [patent_app_type] => utility [patent_app_number] => 17/771368 [patent_app_country] => US [patent_app_date] => 2020-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9597 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17771368 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/771368
Component Composite and Method for Probing and Producing Components Oct 5, 2020 Abandoned
Array ( [id] => 18623811 [patent_doc_number] => 11756867 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-12 [patent_title] => Power module including lead frame unit connecting first substrate and second substrate [patent_app_type] => utility [patent_app_number] => 17/038429 [patent_app_country] => US [patent_app_date] => 2020-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 6946 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 404 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17038429 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/038429
Power module including lead frame unit connecting first substrate and second substrate Sep 29, 2020 Issued
Array ( [id] => 19168597 [patent_doc_number] => 11984512 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-14 [patent_title] => Memory structure for self-erasing secret storage [patent_app_type] => utility [patent_app_number] => 17/033444 [patent_app_country] => US [patent_app_date] => 2020-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7096 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17033444 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/033444
Memory structure for self-erasing secret storage Sep 24, 2020 Issued
Array ( [id] => 17485982 [patent_doc_number] => 20220093486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => POWER SEMICONDUCTOR MODULE WITH CLAMPING DEVICE [patent_app_type] => utility [patent_app_number] => 17/027772 [patent_app_country] => US [patent_app_date] => 2020-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6325 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17027772 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/027772
POWER SEMICONDUCTOR MODULE WITH CLAMPING DEVICE Sep 21, 2020 Abandoned
Array ( [id] => 17477410 [patent_doc_number] => 20220084914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => SEMICONDUCTOR PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/023267 [patent_app_country] => US [patent_app_date] => 2020-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5049 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17023267 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/023267
Semiconductor package structure having a lead frame and a passive component Sep 15, 2020 Issued
Array ( [id] => 18579133 [patent_doc_number] => 11735673 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-22 [patent_title] => Semiconductor device for improving performance of a block insulator and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/019662 [patent_app_country] => US [patent_app_date] => 2020-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 3960 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17019662 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/019662
Semiconductor device for improving performance of a block insulator and method of manufacturing the same Sep 13, 2020 Issued
Array ( [id] => 17070663 [patent_doc_number] => 20210272880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-02 [patent_title] => SEMICONDUCTOR PACKAGE INCLUDING COMPOSITE MOLDING STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/016115 [patent_app_country] => US [patent_app_date] => 2020-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7207 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17016115 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/016115
Semiconductor package including composite molding structure Sep 8, 2020 Issued
Array ( [id] => 16692176 [patent_doc_number] => 20210074655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => SECURED FLOATING GATE TRANSISTOR AND METHOD FOR SECURING FLOATING GATE TRANSISTORS [patent_app_type] => utility [patent_app_number] => 17/011190 [patent_app_country] => US [patent_app_date] => 2020-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3719 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17011190 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/011190
SECURED FLOATING GATE TRANSISTOR AND METHOD FOR SECURING FLOATING GATE TRANSISTORS Sep 2, 2020 Abandoned
Array ( [id] => 18913046 [patent_doc_number] => 11876033 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-16 [patent_title] => Semiconductor device including resin case having groove at corner thereof [patent_app_type] => utility [patent_app_number] => 17/005594 [patent_app_country] => US [patent_app_date] => 2020-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 4380 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17005594 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/005594
Semiconductor device including resin case having groove at corner thereof Aug 27, 2020 Issued
Array ( [id] => 16556983 [patent_doc_number] => 20210002131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-07 [patent_title] => METHOD FOR MANUFACTURING MICROMECHANICAL STRUCTURES IN A DEVICE WAFER [patent_app_type] => utility [patent_app_number] => 17/003703 [patent_app_country] => US [patent_app_date] => 2020-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8575 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 324 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17003703 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/003703
Method for manufacturing micromechanical structures in a device wafer Aug 25, 2020 Issued
Menu