Search

Cara E. Rakowski

Examiner (ID: 19110, Phone: (571)272-4206 , Office: P/2872 )

Most Active Art Unit
2872
Art Unit(s)
2872
Total Applications
623
Issued Applications
372
Pending Applications
75
Abandoned Applications
189

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20557120 [patent_doc_number] => 20260056906 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-26 [patent_title] => NVLink Non-Transparent Memory Bridging [patent_app_type] => utility [patent_app_number] => 19/371826 [patent_app_country] => US [patent_app_date] => 2025-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 193871 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19371826 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/371826
NVLink Non-Transparent Memory Bridging Oct 27, 2025 Pending
Array ( [id] => 20557118 [patent_doc_number] => 20260056904 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-26 [patent_title] => Memory Pooling and Sharing Enabling Scalable LLM Inference over Scaleup AI Fabrics [patent_app_type] => utility [patent_app_number] => 19/371722 [patent_app_country] => US [patent_app_date] => 2025-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 194059 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19371722 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/371722
Memory pooling and sharing enabling scalable LLM inference over scaleup AI fabrics Oct 27, 2025 Issued
Array ( [id] => 20061746 [patent_doc_number] => 20250199968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => PHYSICAL LAYER OF HIGH-SPEED MEMORY AND READ TRAINING METHOD OF HIGH-SPEED MEMORY [patent_app_type] => utility [patent_app_number] => 18/985647 [patent_app_country] => US [patent_app_date] => 2024-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18985647 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/985647
PHYSICAL LAYER OF HIGH-SPEED MEMORY AND READ TRAINING METHOD OF HIGH-SPEED MEMORY Dec 17, 2024 Pending
Array ( [id] => 20061759 [patent_doc_number] => 20250199981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => Device for Automatic Detection of Connection of a Unit Intended for Flashing and a Method of Automatic Detection using this Device [patent_app_type] => utility [patent_app_number] => 18/979946 [patent_app_country] => US [patent_app_date] => 2024-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2206 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18979946 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/979946
Device for Automatic Detection of Connection of a Unit Intended for Flashing and a Method of Automatic Detection using this Device Dec 12, 2024 Pending
Array ( [id] => 20337991 [patent_doc_number] => 20250342111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-06 [patent_title] => SMARTPHONE INSPECTION DEVICE [patent_app_type] => utility [patent_app_number] => 18/966522 [patent_app_country] => US [patent_app_date] => 2024-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18966522 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/966522
SMARTPHONE INSPECTION DEVICE Dec 2, 2024 Pending
Array ( [id] => 20052160 [patent_doc_number] => 20250190382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => NETWORK PACKET PROCESSING APPARATUS [patent_app_type] => utility [patent_app_number] => 18/963735 [patent_app_country] => US [patent_app_date] => 2024-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18963735 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/963735
NETWORK PACKET PROCESSING APPARATUS Nov 27, 2024 Pending
Array ( [id] => 19819258 [patent_doc_number] => 20250077465 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => USB CONTROLLER ENDPOINT RESOURCE MANAGEMENT [patent_app_type] => utility [patent_app_number] => 18/950913 [patent_app_country] => US [patent_app_date] => 2024-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6559 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18950913 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/950913
USB CONTROLLER ENDPOINT RESOURCE MANAGEMENT Nov 17, 2024 Pending
Array ( [id] => 20070790 [patent_doc_number] => 20250209012 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-26 [patent_title] => SYSTEM COMPRISING A PROCESSOR AND PERIPHERALS [patent_app_type] => utility [patent_app_number] => 18/924034 [patent_app_country] => US [patent_app_date] => 2024-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18924034 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/924034
SYSTEM COMPRISING A PROCESSOR AND PERIPHERALS Oct 22, 2024 Pending
Array ( [id] => 20680618 [patent_doc_number] => 20260119439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-30 [patent_title] => HETEROGENEOUS ACCELERATION DEVICE, SYSTEM, METHOD, AND APPARATUS, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 19/143865 [patent_app_country] => US [patent_app_date] => 2024-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7128 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19143865 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/143865
HETEROGENEOUS ACCELERATION DEVICE, SYSTEM, METHOD, AND APPARATUS, AND STORAGE MEDIUM Sep 28, 2024 Pending
Array ( [id] => 19878657 [patent_doc_number] => 20250110914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-03 [patent_title] => Serial Peripheral Interface Communication System and Method [patent_app_type] => utility [patent_app_number] => 18/894397 [patent_app_country] => US [patent_app_date] => 2024-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4171 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18894397 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/894397
Serial Peripheral Interface Communication System and Method Sep 23, 2024 Pending
Array ( [id] => 20601866 [patent_doc_number] => 20260079876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-19 [patent_title] => APPARATUS, SYSTEM AND/OR METHOD FOR PROVIDING A DATA INDEX COMMUNICATION PROTOCOL FOR A VEHICLE [patent_app_type] => utility [patent_app_number] => 18/885976 [patent_app_country] => US [patent_app_date] => 2024-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18885976 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/885976
APPARATUS, SYSTEM AND/OR METHOD FOR PROVIDING A DATA INDEX COMMUNICATION PROTOCOL FOR A VEHICLE Sep 15, 2024 Pending
Array ( [id] => 20587264 [patent_doc_number] => 20260072859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-12 [patent_title] => LOW-LATENCY CONTROL INTERFACE AND PROTOCOL [patent_app_type] => utility [patent_app_number] => 18/829936 [patent_app_country] => US [patent_app_date] => 2024-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4472 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18829936 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/829936
LOW-LATENCY CONTROL INTERFACE AND PROTOCOL Sep 9, 2024 Pending
Array ( [id] => 19834344 [patent_doc_number] => 20250086130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => COMMANDER SUBSCRIBER STATION FOR A SERIAL BUS SYSTEM, RESPONDER SUBSCRIBER STATION FOR A SERIAL BUS SYSTEM, AND METHOD FOR COMMUNICATION IN A SERIAL BUS SYSTEM [patent_app_type] => utility [patent_app_number] => 18/809591 [patent_app_country] => US [patent_app_date] => 2024-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9697 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18809591 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/809591
COMMANDER SUBSCRIBER STATION FOR A SERIAL BUS SYSTEM, RESPONDER SUBSCRIBER STATION FOR A SERIAL BUS SYSTEM, AND METHOD FOR COMMUNICATION IN A SERIAL BUS SYSTEM Aug 19, 2024 Pending
Array ( [id] => 19819261 [patent_doc_number] => 20250077468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => CHIPLET SYSTEM AND METHOD FOR COMMUNICATING BETWEEN CHIPLETS IN CHIPLET SYSTEM [patent_app_type] => utility [patent_app_number] => 18/807843 [patent_app_country] => US [patent_app_date] => 2024-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13261 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18807843 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/807843
Chiplet system and method for communicating between chiplets in chiplet system Aug 15, 2024 Issued
Array ( [id] => 19942069 [patent_doc_number] => 12314198 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-05-27 [patent_title] => Synchronization optimization method for EtherCAT master slaves [patent_app_type] => utility [patent_app_number] => 18/800161 [patent_app_country] => US [patent_app_date] => 2024-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 0 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18800161 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/800161
Synchronization optimization method for EtherCAT master slaves Aug 11, 2024 Issued
Array ( [id] => 19878483 [patent_doc_number] => 20250110740 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-03 [patent_title] => Selective Toggle Suppression in Multiplexed Datapaths [patent_app_type] => utility [patent_app_number] => 18/798800 [patent_app_country] => US [patent_app_date] => 2024-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11486 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18798800 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/798800
Selective Toggle Suppression in Multiplexed Datapaths Aug 7, 2024 Pending
Array ( [id] => 20000827 [patent_doc_number] => 20250139049 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => USB CABLE, E-MARKER DEVICE, AND HUMIDITY DETECTION METHOD FOR USB CONNECTOR [patent_app_type] => utility [patent_app_number] => 18/791435 [patent_app_country] => US [patent_app_date] => 2024-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1101 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -37 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18791435 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/791435
USB CABLE, E-MARKER DEVICE, AND HUMIDITY DETECTION METHOD FOR USB CONNECTOR Jul 31, 2024 Pending
Array ( [id] => 20500718 [patent_doc_number] => 20260030179 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-29 [patent_title] => MANAGEMENT AND RECOVERY OF FLASHLESS DATA PROCESSING SYSTEM PERIPHERAL DEVICES [patent_app_type] => utility [patent_app_number] => 18/785449 [patent_app_country] => US [patent_app_date] => 2024-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5410 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18785449 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/785449
MANAGEMENT AND RECOVERY OF FLASHLESS DATA PROCESSING SYSTEM PERIPHERAL DEVICES Jul 25, 2024 Pending
Array ( [id] => 20061744 [patent_doc_number] => 20250199966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => Computing-in-Memory Chip Architecture, Packaging Method, and Apparatus [patent_app_type] => utility [patent_app_number] => 18/786388 [patent_app_country] => US [patent_app_date] => 2024-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3668 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18786388 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/786388
Computing-in-Memory Chip Architecture, Packaging Method, and Apparatus Jul 25, 2024 Pending
Array ( [id] => 19725913 [patent_doc_number] => 20250028664 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => DMA PMM FOR TRANSFER GROUPS [patent_app_type] => utility [patent_app_number] => 18/774029 [patent_app_country] => US [patent_app_date] => 2024-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4075 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18774029 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/774029
DMA PMM FOR TRANSFER GROUPS Jul 15, 2024 Pending
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